aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/plat-s5p/irq-pm.c
blob: d957398e0f29a9e4403c3093e5adb62bd87eaf84 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
/* linux/arch/arm/plat-s5p/irq-pm.c
 *
 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 *
 * Based on arch/arm/plat-s3c24xx/irq-pm.c,
 * Copyright (c) 2003,2004 Simtec Electronics
 *	Ben Dooks <ben@simtec.co.uk>
 *	http://armlinux.simtec.co.uk/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
*/

#include <linux/init.h>
#include <linux/module.h>
#include <linux/interrupt.h>

#include <plat/cpu.h>
#include <plat/irqs.h>
#include <plat/pm.h>
#include <mach/map.h>
#include <plat/irq-pm.h>

#include <mach/regs-gpio.h>
#include <mach/regs-irq.h>

/* state for IRQs over sleep */

/* default is to allow for EINT0..EINT31, and IRQ_RTC_TIC, IRQ_RTC_ALARM,
 * as wakeup sources
 *
 * set bit to 1 in allow bitfield to enable the wakeup settings on it
*/

unsigned long s3c_irqwake_intallow	= 0x00000006L;
unsigned long s3c_irqwake_eintallow	= 0xffffffffL;

int s3c_irq_wake(struct irq_data *data, unsigned int state)
{
	unsigned long irqbit;

	switch (data->irq) {
	case IRQ_RTC_ALARM:
		irqbit = 1 << 1;
		break;
	case IRQ_RTC_TIC:
		irqbit = 1 << 2;
		break;
	case IRQ_ADC:
		irqbit = 1 << 3;
		break;
	case IRQ_ADC1:
		irqbit = 1 << 4;
		break;
	case IRQ_KEYPAD:
		irqbit = 1 << 5;
		break;
	case IRQ_HSMMC0:
		irqbit = 1 << 9;
		break;
	case IRQ_HSMMC1:
		irqbit = 1 << 10;
		break;
	case IRQ_HSMMC2:
		irqbit = 1 << 11;
		break;
	case IRQ_HSMMC3:
		irqbit = 1 << 12;
		break;
	case IRQ_I2S0:
		irqbit = 1 << 13;
		break;
	case IRQ_SYSTIMER:
		irqbit = 1 << 14;
		break;
	case IRQ_CEC:
		irqbit = 1 << 15;
		break;
	default:
		return -ENOENT;
	}
	if (!state)
		s3c_irqwake_intmask |= irqbit;
	else
		s3c_irqwake_intmask &= ~irqbit;
	return 0;
}

static struct sleep_save eint_save[] = {
	SAVE_ITEM(S5P_EINT_CON(0)),
	SAVE_ITEM(S5P_EINT_CON(1)),
	SAVE_ITEM(S5P_EINT_CON(2)),
	SAVE_ITEM(S5P_EINT_CON(3)),

	SAVE_ITEM(S5P_EINT_MASK(0)),
	SAVE_ITEM(S5P_EINT_MASK(1)),
	SAVE_ITEM(S5P_EINT_MASK(2)),
	SAVE_ITEM(S5P_EINT_MASK(3)),

	SAVE_ITEM(S5P_EINT_FLTCON(0,0)),
	SAVE_ITEM(S5P_EINT_FLTCON(0,1)),
	SAVE_ITEM(S5P_EINT_FLTCON(1,0)),
	SAVE_ITEM(S5P_EINT_FLTCON(1,1)),
	SAVE_ITEM(S5P_EINT_FLTCON(2,0)),
	SAVE_ITEM(S5P_EINT_FLTCON(2,1)),
	SAVE_ITEM(S5P_EINT_FLTCON(3,0)),
	SAVE_ITEM(S5P_EINT_FLTCON(3,1)),
};

int s3c24xx_irq_suspend(void)
{
	s3c_pm_do_save(eint_save, ARRAY_SIZE(eint_save));

	return 0;
}

void s3c24xx_irq_resume(void)
{
	s3c_pm_do_restore(eint_save, ARRAY_SIZE(eint_save));
}