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| author | huisung.kang <hs1218.kang@samsung.com> | 2010-10-19 13:53:38 -0700 |
|---|---|---|
| committer | Arve Hjønnevåg <arve@android.com> | 2011-11-17 17:51:33 -0800 |
| commit | 6e4933ab67cacc3257e08074196de45c26c0d36a (patch) | |
| tree | 898940bd376bf1e6e02195227c31f14c0378cb34 | |
| parent | 1b035c0934d9ae2cc6a4ba35ad3a1b2f8a837258 (diff) | |
| download | kernel_samsung_crespo-6e4933ab67cacc3257e08074196de45c26c0d36a.zip kernel_samsung_crespo-6e4933ab67cacc3257e08074196de45c26c0d36a.tar.gz kernel_samsung_crespo-6e4933ab67cacc3257e08074196de45c26c0d36a.tar.bz2 | |
S5PC11X: PD: Add G3D power domain gating code.
Change-Id: I11d2dd2e666249264c48c344ce67c0ae9082e598
Signed-off-by: huisung.kang <hs1218.kang@samsung.com>
| -rw-r--r-- | arch/arm/mach-s5pv210/power-domain.c | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/arm/mach-s5pv210/power-domain.c b/arch/arm/mach-s5pv210/power-domain.c index abdd91d..0a10ef2 100644 --- a/arch/arm/mach-s5pv210/power-domain.c +++ b/arch/arm/mach-s5pv210/power-domain.c @@ -60,6 +60,10 @@ static struct regulator_consumer_supply s5pv210_pd_lcd_supply[] = { REGULATOR_SUPPLY("pd", "s3cfb"), }; +static struct regulator_consumer_supply s5pv210_pd_g3d_supply[] = { + REGULATOR_SUPPLY("pd", "pvrsrvkm"), +}; + static struct regulator_consumer_supply s5pv210_pd_mfc_supply[] = { REGULATOR_SUPPLY("pd", "s3c-mfc"), }; @@ -100,6 +104,15 @@ static struct regulator_init_data s5pv210_pd_lcd_data = { .consumer_supplies = s5pv210_pd_lcd_supply, }; +static struct regulator_init_data s5pv210_pd_g3d_data = { + .constraints = { + .valid_modes_mask = REGULATOR_MODE_NORMAL, + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies = ARRAY_SIZE(s5pv210_pd_g3d_supply), + .consumer_supplies = s5pv210_pd_g3d_supply, +}; + static struct regulator_init_data s5pv210_pd_mfc_data = { .constraints = { .valid_modes_mask = REGULATOR_MODE_NORMAL, @@ -175,6 +188,15 @@ struct clk_should_be_running s5pv210_pd_lcd_clk[] = { }, }; +struct clk_should_be_running s5pv210_pd_g3d_clk[] = { + { + .clk_name = "sclk", + .dev = &s3c_device_g3d.dev, + }, { + /* end of the clock array */ + }, +}; + struct clk_should_be_running s5pv210_pd_mfc_clk[] = { { .clk_name = "mfc", @@ -216,6 +238,14 @@ static struct s5pv210_pd_config s5pv210_pd_lcd_pdata = { .ctrlbit = S5PV210_PD_LCD, }; +static struct s5pv210_pd_config s5pv210_pd_g3d_pdata = { + .supply_name = "pd_g3d_supply", + .microvolts = 5000000, + .init_data = &s5pv210_pd_g3d_data, + .clk_run = s5pv210_pd_g3d_clk, + .ctrlbit = S5PV210_PD_G3D, +}; + static struct s5pv210_pd_config s5pv210_pd_mfc_pdata = { .supply_name = "pd_mfc_supply", .microvolts = 5000000, @@ -256,6 +286,14 @@ struct platform_device s5pv210_pd_lcd = { }, }; +struct platform_device s5pv210_pd_g3d = { + .name = "reg-s5pv210-pd", + .id = 4, + .dev = { + .platform_data = &s5pv210_pd_g3d_pdata, + }, +}; + struct platform_device s5pv210_pd_mfc = { .name = "reg-s5pv210-pd", .id = 5, |