gpu: pvr: Update to DDK 1.8@785978

 - Revert 1.8@778707 bugfix to queue.c (again).
 - Merge up refcount debugging changes (can still be compiled out).

Change-Id: I59faeba3211b20566ec846528ae9f68c51181b67

8 files changed, 166 insertions, 25 deletions

diff --git a/drivers/gpu/pvr/buffer_manager.c b/drivers/gpu/pvr/buffer_manager.c
index d58d19d..27ed8a1 100644
--- a/drivers/gpu/pvr/buffer_manager.c
+++ b/drivers/gpu/pvr/buffer_manager.c
@@ -1756,7 +1756,12 @@ DevMemoryFree (BM_MAPPING *pMapping)
 
 #define XPROC_WORKAROUND_BAD_SHAREINDEX 0773407734
 
+#define XPROC_WORKAROUND_UNKNOWN	0
+#define XPROC_WORKAROUND_ALLOC		1
+#define XPROC_WORKAROUND_MAP		2
+
 static IMG_UINT32 gXProcWorkaroundShareIndex = XPROC_WORKAROUND_BAD_SHAREINDEX;
+static IMG_UINT32 gXProcWorkaroundState = XPROC_WORKAROUND_UNKNOWN;
 
  
 static struct {
@@ -1782,6 +1787,7 @@ PVRSRV_ERROR BM_XProcWorkaroundSetShareIndex(IMG_UINT32 ui32Index)
 	}
 
 	gXProcWorkaroundShareIndex = ui32Index;
+	gXProcWorkaroundState = XPROC_WORKAROUND_MAP;
 
 	return PVRSRV_OK;
 }
@@ -1803,6 +1809,7 @@ PVRSRV_ERROR BM_XProcWorkaroundUnsetShareIndex(IMG_UINT32 ui32Index)
 	}
 
 	gXProcWorkaroundShareIndex = XPROC_WORKAROUND_BAD_SHAREINDEX;
+	gXProcWorkaroundState = XPROC_WORKAROUND_UNKNOWN;
 
 	return PVRSRV_OK;
 }
@@ -1822,6 +1829,7 @@ PVRSRV_ERROR BM_XProcWorkaroundFindNewBufferAndSetShareIndex(IMG_UINT32 *pui32In
 		if (gXProcWorkaroundShareData[*pui32Index].ui32RefCount == 0)
 		{
 			gXProcWorkaroundShareIndex = *pui32Index;
+			gXProcWorkaroundState = XPROC_WORKAROUND_ALLOC;
 			return PVRSRV_OK;
 		}
 	}
@@ -1886,6 +1894,14 @@ XProcWorkaroundAllocShareable(RA_ARENA *psArena,
 	}
 	else
 	{
+		if (gXProcWorkaroundState != XPROC_WORKAROUND_ALLOC)
+		{
+			PVR_DPF((PVR_DBG_ERROR,
+					 "XPROC workaround in bad state! About to allocate memory from non-alloc state! (%d)",
+					 gXProcWorkaroundState));
+		}
+		PVR_ASSERT(gXProcWorkaroundState == XPROC_WORKAROUND_ALLOC);
+
 		if (psArena != IMG_NULL)
 		{
 			IMG_CPU_PHYADDR sCpuPAddr;
diff --git a/drivers/gpu/pvr/devicemem.c b/drivers/gpu/pvr/devicemem.c
index a7ccc8c..cd22faa 100644
--- a/drivers/gpu/pvr/devicemem.c
+++ b/drivers/gpu/pvr/devicemem.c
@@ -597,6 +597,10 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVFreeSyncInfoKM(PVRSRV_KERNEL_SYNC_INFO	*psKernel
 	}
 
 	eError = FreeDeviceMem(psKernelSyncInfo->psSyncDataMemInfoKM);
+
+	
+	psKernelSyncInfo->psSyncDataMemInfoKM = IMG_NULL;
+	psKernelSyncInfo->psSyncData = IMG_NULL;
 	(IMG_VOID)OSFreeMem(PVRSRV_PAGEABLE_SELECT, sizeof(PVRSRV_KERNEL_SYNC_INFO), psKernelSyncInfo, IMG_NULL);
 	
 
@@ -1683,9 +1687,6 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVMapDeviceClassMemoryKM(PVRSRV_PER_PROCESS_DATA	*
 	}
 
 	OSMemSet(psMemInfo, 0, sizeof(*psMemInfo));
-#if defined(NO_HARDWARE)
-	psMemInfo->ui32Flags = PVRSRV_HAP_CACHED;
-#endif
 
 	psMemBlock = &(psMemInfo->sMemBlk);
 
diff --git a/drivers/gpu/pvr/pvrversion.h b/drivers/gpu/pvr/pvrversion.h
index 417f614..1065b1c 100644
--- a/drivers/gpu/pvr/pvrversion.h
+++ b/drivers/gpu/pvr/pvrversion.h
@@ -36,7 +36,7 @@
 
 #define PVRVERSION_FAMILY           "sgxddk"
 #define PVRVERSION_BRANCHNAME       "1.8"
-#define PVRVERSION_BUILD             782952
+#define PVRVERSION_BUILD             785978
 #define PVRVERSION_BSCONTROL        "CustomerGoogle_Android_ogles1_ogles2_GPL"
 
 #define PVRVERSION_STRING           "CustomerGoogle_Android_ogles1_ogles2_GPL sgxddk 18 1.8@" PVR_STR2(PVRVERSION_BUILD)
@@ -45,7 +45,7 @@
 #define COPYRIGHT_TXT               "Copyright (c) Imagination Technologies Ltd. All Rights Reserved."
 
 #define PVRVERSION_BUILD_HI          78
-#define PVRVERSION_BUILD_LO          2952
+#define PVRVERSION_BUILD_LO          5978
 #define PVRVERSION_STRING_NUMERIC    PVR_STR2(PVRVERSION_MAJ) "." PVR_STR2(PVRVERSION_MIN) "." PVR_STR2(PVRVERSION_BUILD_HI) "." PVR_STR2(PVRVERSION_BUILD_LO)
 
 #endif /* _PVRVERSION_H_ */
diff --git a/drivers/gpu/pvr/queue.c b/drivers/gpu/pvr/queue.c
index 3bfd6c6..4682094 100644
--- a/drivers/gpu/pvr/queue.c
+++ b/drivers/gpu/pvr/queue.c
@@ -25,7 +25,6 @@
  ******************************************************************************/
 
 #include "services_headers.h"
-#include "pvr_bridge_km.h"
 
 #include "lists.h"
 #include "ttrace.h"
@@ -626,8 +625,6 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVInsertCommandKM(PVRSRV_QUEUE_INFO	*psQueue,
 		psCommand->psDstSync[i].ui32WriteOpsPending = PVRSRVGetWriteOpsPending(apsDstSync[i], IMG_FALSE);
 		psCommand->psDstSync[i].ui32ReadOps2Pending = PVRSRVGetReadOpsPending(apsDstSync[i], IMG_FALSE);
 
-		PVRSRVKernelSyncInfoIncRef(apsDstSync[i], IMG_NULL);
-
 		PVR_DPF((PVR_DBG_MESSAGE, "PVRSRVInsertCommandKM: Dst %u RO-VA:0x%x WO-VA:0x%x ROP:0x%x WOP:0x%x",
 				i, psCommand->psDstSync[i].psKernelSyncInfoKM->sReadOps2CompleteDevVAddr.uiAddr,
 				psCommand->psDstSync[i].psKernelSyncInfoKM->sWriteOpsCompleteDevVAddr.uiAddr,
@@ -645,8 +642,6 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVInsertCommandKM(PVRSRV_QUEUE_INFO	*psQueue,
 		psCommand->psSrcSync[i].ui32WriteOpsPending = PVRSRVGetWriteOpsPending(apsSrcSync[i], IMG_TRUE);
 		psCommand->psSrcSync[i].ui32ReadOps2Pending = PVRSRVGetReadOpsPending(apsSrcSync[i], IMG_TRUE);
 
-		PVRSRVKernelSyncInfoIncRef(apsSrcSync[i], IMG_NULL);
-
 		PVR_DPF((PVR_DBG_MESSAGE, "PVRSRVInsertCommandKM: Src %u RO-VA:0x%x WO-VA:0x%x ROP:0x%x WOP:0x%x",
 				i, psCommand->psSrcSync[i].psKernelSyncInfoKM->sReadOps2CompleteDevVAddr.uiAddr,
 				psCommand->psSrcSync[i].psKernelSyncInfoKM->sWriteOpsCompleteDevVAddr.uiAddr,
@@ -1008,12 +1003,6 @@ IMG_VOID PVRSRVCommandCompleteKM(IMG_HANDLE	hCmdCookie,
 	{
 		psCmdCompleteData->psDstSync[i].psKernelSyncInfoKM->psSyncData->ui32WriteOpsComplete++;
 
-		PVRSRVKernelSyncInfoDecRef(psCmdCompleteData->psDstSync[i].psKernelSyncInfoKM, IMG_NULL);
-		if (psCmdCompleteData->psDstSync[i].psKernelSyncInfoKM->ui32RefCount == 0)
-		{
-			PVRSRVFreeSyncInfoKM(psCmdCompleteData->psDstSync[i].psKernelSyncInfoKM);
-		}
-
 		PVR_TTRACE_SYNC_OBJECT(PVRSRV_TRACE_GROUP_QUEUE, QUEUE_TOKEN_UPDATE_DST,
 					  psCmdCompleteData->psDstSync[i].psKernelSyncInfoKM,
 					  PVRSRV_SYNCOP_COMPLETE);
@@ -1030,12 +1019,6 @@ IMG_VOID PVRSRVCommandCompleteKM(IMG_HANDLE	hCmdCookie,
 	{
 		psCmdCompleteData->psSrcSync[i].psKernelSyncInfoKM->psSyncData->ui32ReadOps2Complete++;
 
-		PVRSRVKernelSyncInfoDecRef(psCmdCompleteData->psSrcSync[i].psKernelSyncInfoKM, IMG_NULL);
-		if (psCmdCompleteData->psSrcSync[i].psKernelSyncInfoKM->ui32RefCount == 0)
-		{
-			PVRSRVFreeSyncInfoKM(psCmdCompleteData->psSrcSync[i].psKernelSyncInfoKM);
-		}
-
 		PVR_TTRACE_SYNC_OBJECT(PVRSRV_TRACE_GROUP_QUEUE, QUEUE_TOKEN_UPDATE_SRC,
 					  psCmdCompleteData->psSrcSync[i].psKernelSyncInfoKM,
 					  PVRSRV_SYNCOP_COMPLETE);
@@ -1202,7 +1185,6 @@ PVRSRV_ERROR PVRSRVRemoveCmdProcListKM(IMG_UINT32 ui32DevIndex,
 				
 				if (psCmdCompleteData != IMG_NULL)
 				{
-					PVR_ASSERT(psCmdCompleteData->bInUse == IMG_FALSE);
 					OSFreeMem(PVRSRV_OS_NON_PAGEABLE_HEAP, psCmdCompleteData->ui32AllocSize,
 							  psCmdCompleteData, IMG_NULL);
 					psDeviceCommandData[ui32CmdTypeCounter].apsCmdCompleteData[ui32CmdCounter] = IMG_NULL;
diff --git a/drivers/gpu/pvr/refcount.c b/drivers/gpu/pvr/refcount.c
index e13ae0b..8b00972 100644
--- a/drivers/gpu/pvr/refcount.c
+++ b/drivers/gpu/pvr/refcount.c
@@ -19,9 +19,29 @@ static DEFINE_MUTEX(gsCCBLock);
 #define PVRSRV_UNLOCK_CCB()	mutex_unlock(&gsCCBLock)
 #endif /* __linux__ */
 
-#define PVRSRV_REFCOUNT_CCB_MAX			256
+#define PVRSRV_REFCOUNT_CCB_MAX			512
 #define PVRSRV_REFCOUNT_CCB_MESG_MAX	80
 
+#define PVRSRV_REFCOUNT_CCB_DEBUG_SYNCINFO	(1U << 0)
+#define PVRSRV_REFCOUNT_CCB_DEBUG_MEMINFO	(1U << 1)
+#define PVRSRV_REFCOUNT_CCB_DEBUG_BM_BUF	(1U << 2)
+#define PVRSRV_REFCOUNT_CCB_DEBUG_BM_BUF2	(1U << 3)
+
+#if defined(__linux__)
+#define PVRSRV_REFCOUNT_CCB_DEBUG_MMAP		(1U << 4)
+#define PVRSRV_REFCOUNT_CCB_DEBUG_MMAP2		(1U << 5)
+#else
+#define PVRSRV_REFCOUNT_CCB_DEBUG_MMAP		0
+#define PVRSRV_REFCOUNT_CCB_DEBUG_MMAP2		0
+#endif
+
+#define PVRSRV_REFCOUNT_CCB_DEBUG_ALL		~0U
+
+/*static const IMG_UINT guiDebugMask = PVRSRV_REFCOUNT_CCB_DEBUG_ALL;*/
+static const IMG_UINT guiDebugMask =
+	PVRSRV_REFCOUNT_CCB_DEBUG_SYNCINFO |
+	PVRSRV_REFCOUNT_CCB_DEBUG_MMAP2;
+
 typedef struct
 {
 	const IMG_CHAR *pszFile;
@@ -75,6 +95,9 @@ void PVRSRVKernelSyncInfoIncRef2(const IMG_CHAR *pszFile, IMG_INT iLine,
 								 PVRSRV_KERNEL_SYNC_INFO *psKernelSyncInfo,
 								 PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo)
 {
+	if(!(guiDebugMask & PVRSRV_REFCOUNT_CCB_DEBUG_SYNCINFO))
+		goto skip;
+
 	PVRSRV_LOCK_CCB();
 
 	gsRefCountCCB[giOffset].pszFile = pszFile;
@@ -95,6 +118,8 @@ void PVRSRVKernelSyncInfoIncRef2(const IMG_CHAR *pszFile, IMG_INT iLine,
 	giOffset = (giOffset + 1) % PVRSRV_REFCOUNT_CCB_MAX;
 
 	PVRSRV_UNLOCK_CCB();
+
+skip:
 	psKernelSyncInfo->ui32RefCount++;
 }
 
@@ -103,6 +128,9 @@ void PVRSRVKernelSyncInfoDecRef2(const IMG_CHAR *pszFile, IMG_INT iLine,
 								 PVRSRV_KERNEL_SYNC_INFO *psKernelSyncInfo,
 								 PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo)
 {
+	if(!(guiDebugMask & PVRSRV_REFCOUNT_CCB_DEBUG_SYNCINFO))
+		goto skip;
+
 	PVRSRV_LOCK_CCB();
 
 	gsRefCountCCB[giOffset].pszFile = pszFile;
@@ -123,6 +151,8 @@ void PVRSRVKernelSyncInfoDecRef2(const IMG_CHAR *pszFile, IMG_INT iLine,
 	giOffset = (giOffset + 1) % PVRSRV_REFCOUNT_CCB_MAX;
 
 	PVRSRV_UNLOCK_CCB();
+
+skip:
 	psKernelSyncInfo->ui32RefCount--;
 }
 
@@ -130,6 +160,9 @@ IMG_INTERNAL
 void PVRSRVKernelMemInfoIncRef2(const IMG_CHAR *pszFile, IMG_INT iLine,
 								PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo)
 {
+	if(!(guiDebugMask & PVRSRV_REFCOUNT_CCB_DEBUG_MEMINFO))
+		goto skip;
+
 	PVRSRV_LOCK_CCB();
 
 	gsRefCountCCB[giOffset].pszFile = pszFile;
@@ -150,6 +183,8 @@ void PVRSRVKernelMemInfoIncRef2(const IMG_CHAR *pszFile, IMG_INT iLine,
 	giOffset = (giOffset + 1) % PVRSRV_REFCOUNT_CCB_MAX;
 
 	PVRSRV_UNLOCK_CCB();
+
+skip:
 	psKernelMemInfo->ui32RefCount++;
 }
 
@@ -157,6 +192,9 @@ IMG_INTERNAL
 void PVRSRVKernelMemInfoDecRef2(const IMG_CHAR *pszFile, IMG_INT iLine,
 								PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo)
 {
+	if(!(guiDebugMask & PVRSRV_REFCOUNT_CCB_DEBUG_MEMINFO))
+		goto skip;
+
 	PVRSRV_LOCK_CCB();
 
 	gsRefCountCCB[giOffset].pszFile = pszFile;
@@ -177,12 +215,17 @@ void PVRSRVKernelMemInfoDecRef2(const IMG_CHAR *pszFile, IMG_INT iLine,
 	giOffset = (giOffset + 1) % PVRSRV_REFCOUNT_CCB_MAX;
 
 	PVRSRV_UNLOCK_CCB();
+
+skip:
 	psKernelMemInfo->ui32RefCount--;
 }
 
 IMG_INTERNAL
 void PVRSRVBMBufIncRef2(const IMG_CHAR *pszFile, IMG_INT iLine, BM_BUF *pBuf)
 {
+	if(!(guiDebugMask & PVRSRV_REFCOUNT_CCB_DEBUG_BM_BUF))
+		goto skip;
+
 	PVRSRV_LOCK_CCB();
 
 	gsRefCountCCB[giOffset].pszFile = pszFile;
@@ -203,12 +246,17 @@ void PVRSRVBMBufIncRef2(const IMG_CHAR *pszFile, IMG_INT iLine, BM_BUF *pBuf)
 	giOffset = (giOffset + 1) % PVRSRV_REFCOUNT_CCB_MAX;
 
 	PVRSRV_UNLOCK_CCB();
+
+skip:
 	pBuf->ui32RefCount++;
 }
 
 IMG_INTERNAL
 void PVRSRVBMBufDecRef2(const IMG_CHAR *pszFile, IMG_INT iLine, BM_BUF *pBuf)
 {
+	if(!(guiDebugMask & PVRSRV_REFCOUNT_CCB_DEBUG_BM_BUF))
+		goto skip;
+
 	PVRSRV_LOCK_CCB();
 
 	gsRefCountCCB[giOffset].pszFile = pszFile;
@@ -229,12 +277,17 @@ void PVRSRVBMBufDecRef2(const IMG_CHAR *pszFile, IMG_INT iLine, BM_BUF *pBuf)
 	giOffset = (giOffset + 1) % PVRSRV_REFCOUNT_CCB_MAX;
 
 	PVRSRV_UNLOCK_CCB();
+
+skip:
 	pBuf->ui32RefCount--;
 }
 
 IMG_INTERNAL
 void PVRSRVBMBufIncExport2(const IMG_CHAR *pszFile, IMG_INT iLine, BM_BUF *pBuf)
 {
+	if(!(guiDebugMask & PVRSRV_REFCOUNT_CCB_DEBUG_BM_BUF2))
+		goto skip;
+
 	PVRSRV_LOCK_CCB();
 
 	gsRefCountCCB[giOffset].pszFile = pszFile;
@@ -255,12 +308,17 @@ void PVRSRVBMBufIncExport2(const IMG_CHAR *pszFile, IMG_INT iLine, BM_BUF *pBuf)
 	giOffset = (giOffset + 1) % PVRSRV_REFCOUNT_CCB_MAX;
 
 	PVRSRV_UNLOCK_CCB();
+
+skip:
 	pBuf->ui32ExportCount++;
 }
 
 IMG_INTERNAL
 void PVRSRVBMBufDecExport2(const IMG_CHAR *pszFile, IMG_INT iLine, BM_BUF *pBuf)
 {
+	if(!(guiDebugMask & PVRSRV_REFCOUNT_CCB_DEBUG_BM_BUF2))
+		goto skip;
+
 	PVRSRV_LOCK_CCB();
 
 	gsRefCountCCB[giOffset].pszFile = pszFile;
@@ -281,6 +339,8 @@ void PVRSRVBMBufDecExport2(const IMG_CHAR *pszFile, IMG_INT iLine, BM_BUF *pBuf)
 	giOffset = (giOffset + 1) % PVRSRV_REFCOUNT_CCB_MAX;
 
 	PVRSRV_UNLOCK_CCB();
+
+skip:
 	pBuf->ui32ExportCount--;
 }
 
@@ -292,6 +352,9 @@ IMG_INTERNAL
 void PVRSRVOffsetStructIncRef2(const IMG_CHAR *pszFile, IMG_INT iLine,
 							   PKV_OFFSET_STRUCT psOffsetStruct)
 {
+	if(!(guiDebugMask & PVRSRV_REFCOUNT_CCB_DEBUG_MMAP))
+		goto skip;
+
 	PVRSRV_LOCK_CCB();
 
 	gsRefCountCCB[giOffset].pszFile = pszFile;
@@ -312,6 +375,8 @@ void PVRSRVOffsetStructIncRef2(const IMG_CHAR *pszFile, IMG_INT iLine,
 	giOffset = (giOffset + 1) % PVRSRV_REFCOUNT_CCB_MAX;
 
 	PVRSRV_UNLOCK_CCB();
+
+skip:
 	psOffsetStruct->ui32RefCount++;
 }
 
@@ -319,6 +384,9 @@ IMG_INTERNAL
 void PVRSRVOffsetStructDecRef2(const IMG_CHAR *pszFile, IMG_INT iLine,
 							   PKV_OFFSET_STRUCT psOffsetStruct)
 {
+	if(!(guiDebugMask & PVRSRV_REFCOUNT_CCB_DEBUG_MMAP))
+		goto skip;
+
 	PVRSRV_LOCK_CCB();
 
 	gsRefCountCCB[giOffset].pszFile = pszFile;
@@ -339,6 +407,8 @@ void PVRSRVOffsetStructDecRef2(const IMG_CHAR *pszFile, IMG_INT iLine,
 	giOffset = (giOffset + 1) % PVRSRV_REFCOUNT_CCB_MAX;
 
 	PVRSRV_UNLOCK_CCB();
+
+skip:
 	psOffsetStruct->ui32RefCount--;
 }
 
@@ -346,6 +416,9 @@ IMG_INTERNAL
 void PVRSRVOffsetStructIncMapped2(const IMG_CHAR *pszFile, IMG_INT iLine,
 								  PKV_OFFSET_STRUCT psOffsetStruct)
 {
+	if(!(guiDebugMask & PVRSRV_REFCOUNT_CCB_DEBUG_MMAP2))
+		goto skip;
+
 	PVRSRV_LOCK_CCB();
 
 	gsRefCountCCB[giOffset].pszFile = pszFile;
@@ -366,6 +439,8 @@ void PVRSRVOffsetStructIncMapped2(const IMG_CHAR *pszFile, IMG_INT iLine,
 	giOffset = (giOffset + 1) % PVRSRV_REFCOUNT_CCB_MAX;
 
 	PVRSRV_UNLOCK_CCB();
+
+skip:
 	psOffsetStruct->ui32Mapped++;
 }
 
@@ -373,6 +448,9 @@ IMG_INTERNAL
 void PVRSRVOffsetStructDecMapped2(const IMG_CHAR *pszFile, IMG_INT iLine,
 								  PKV_OFFSET_STRUCT psOffsetStruct)
 {
+	if(!(guiDebugMask & PVRSRV_REFCOUNT_CCB_DEBUG_MMAP2))
+		goto skip;
+
 	PVRSRV_LOCK_CCB();
 
 	gsRefCountCCB[giOffset].pszFile = pszFile;
@@ -393,6 +471,8 @@ void PVRSRVOffsetStructDecMapped2(const IMG_CHAR *pszFile, IMG_INT iLine,
 	giOffset = (giOffset + 1) % PVRSRV_REFCOUNT_CCB_MAX;
 
 	PVRSRV_UNLOCK_CCB();
+
+skip:
 	psOffsetStruct->ui32Mapped--;
 }
 
diff --git a/drivers/gpu/pvr/sgx/sgxkick.c b/drivers/gpu/pvr/sgx/sgxkick.c
index cbac38e..019a75cb 100644
--- a/drivers/gpu/pvr/sgx/sgxkick.c
+++ b/drivers/gpu/pvr/sgx/sgxkick.c
@@ -573,6 +573,37 @@ PVRSRV_ERROR SGXDoKickKM(IMG_HANDLE hDevHandle, SGX_CCB_KICK *psCCBKick)
 				0,
 				MAKEUNIQUETAG(psCCBMemInfo));
 		}
+
+		if (psCCBKick->hTASyncInfo != IMG_NULL)
+		{
+			psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->hTASyncInfo;
+
+			PDUMPCOMMENT("Modify TA/TQ ROpPendingVal\r\n");
+
+			PDUMPMEM(&psSyncInfo->psSyncData->ui32LastReadOpDumpVal,
+					psCCBMemInfo,
+					psCCBKick->ui32CCBDumpWOff + offsetof(SGXMKIF_CMDTA_SHARED, ui32TATQSyncReadOpsPendingVal),
+					sizeof(IMG_UINT32),
+					0,
+					MAKEUNIQUETAG(psCCBMemInfo));
+			psSyncInfo->psSyncData->ui32LastReadOpDumpVal++;
+		}
+
+		if (psCCBKick->h3DSyncInfo != IMG_NULL)
+		{
+			psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->h3DSyncInfo;
+
+			PDUMPCOMMENT("Modify 3D/TQ ROpPendingVal\r\n");
+
+			PDUMPMEM(&psSyncInfo->psSyncData->ui32LastReadOpDumpVal,
+					psCCBMemInfo,
+					psCCBKick->ui32CCBDumpWOff + offsetof(SGXMKIF_CMDTA_SHARED, ui323DTQSyncReadOpsPendingVal),
+					sizeof(IMG_UINT32),
+					0,
+					MAKEUNIQUETAG(psCCBMemInfo));
+			psSyncInfo->psSyncData->ui32LastReadOpDumpVal++;
+		}
+
 #endif
 
 		for (i = 0; i < psCCBKick->ui32NumTAStatusVals; i++)
diff --git a/drivers/gpu/pvr/sgx/sgxreset.c b/drivers/gpu/pvr/sgx/sgxreset.c
index 0baa11f..7050371 100644
--- a/drivers/gpu/pvr/sgx/sgxreset.c
+++ b/drivers/gpu/pvr/sgx/sgxreset.c
@@ -541,6 +541,7 @@ IMG_VOID SGXReset(PVRSRV_SGXDEV_INFO	*psDevInfo,
 	ui32RegVal = EUR_CR_MASTER_SOFT_RESET_BIF_RESET_MASK  |
 				 EUR_CR_MASTER_SOFT_RESET_IPF_RESET_MASK  |
 				 EUR_CR_MASTER_SOFT_RESET_DPM_RESET_MASK  |
+				 EUR_CR_MASTER_SOFT_RESET_MCI_RESET_MASK  |
 				 EUR_CR_MASTER_SOFT_RESET_VDM_RESET_MASK;
 
 #if defined(SGX_FEATURE_PTLA)
diff --git a/drivers/gpu/pvr/sgx/sgxtransfer.c b/drivers/gpu/pvr/sgx/sgxtransfer.c
index 92ee0bc..d40773e 100644
--- a/drivers/gpu/pvr/sgx/sgxtransfer.c
+++ b/drivers/gpu/pvr/sgx/sgxtransfer.c
@@ -352,7 +352,37 @@ IMG_EXPORT PVRSRV_ERROR SGXSubmitTransferKM(IMG_HANDLE hDevHandle, PVRSRV_TRANSF
 				}
 			}
 		}
-	}		
+
+		if (psKick->hTASyncInfo != IMG_NULL)
+		{
+			psSyncInfo = psKick->hTASyncInfo;
+
+			PDUMPCOMMENT("Tweak TA/TQ surface write op in transfer cmd\r\n");
+			PDUMPMEM(&psSyncInfo->psSyncData->ui32LastOpDumpVal,
+					psCCBMemInfo,
+					psKick->ui32CCBDumpWOff + (IMG_UINT32)(offsetof(SGXMKIF_TRANSFERCMD_SHARED, ui32TASyncWriteOpsPendingVal)),
+					sizeof(psSyncInfo->psSyncData->ui32LastOpDumpVal),
+					psKick->ui32PDumpFlags,
+					MAKEUNIQUETAG(psCCBMemInfo));
+
+			psSyncInfo->psSyncData->ui32LastOpDumpVal++;
+		}
+
+		if (psKick->h3DSyncInfo != IMG_NULL)
+		{
+			psSyncInfo = psKick->h3DSyncInfo;
+
+			PDUMPCOMMENT("Tweak 3D/TQ surface write op in transfer cmd\r\n");
+			PDUMPMEM(&psSyncInfo->psSyncData->ui32LastOpDumpVal,
+					psCCBMemInfo,
+					psKick->ui32CCBDumpWOff + (IMG_UINT32)(offsetof(SGXMKIF_TRANSFERCMD_SHARED, ui323DSyncWriteOpsPendingVal)),
+					sizeof(psSyncInfo->psSyncData->ui32LastOpDumpVal),
+					psKick->ui32PDumpFlags,
+					MAKEUNIQUETAG(psCCBMemInfo));
+
+			psSyncInfo->psSyncData->ui32LastOpDumpVal++;
+		}
+	}
 #endif
 
 	sCommand.ui32Data[1] = psKick->sHWTransferContextDevVAddr.uiAddr;