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| author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-09-21 14:05:45 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-09-21 14:05:45 -0700 |
| commit | ad501bce5771bdea47fd26368a2d435424a1af7e (patch) | |
| tree | aa4fb5973776dfa2488c9fbd0bd4079501a5bebd | |
| parent | da8f153e51290e7438ba7da66234a864e5d3e1c1 (diff) | |
| parent | 8742bc92c36324ac4bac739ab413acc6630a875d (diff) | |
| download | kernel_samsung_crespo-ad501bce5771bdea47fd26368a2d435424a1af7e.zip kernel_samsung_crespo-ad501bce5771bdea47fd26368a2d435424a1af7e.tar.gz kernel_samsung_crespo-ad501bce5771bdea47fd26368a2d435424a1af7e.tar.bz2 | |
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm:
[ARM] 4569/1: ep93xx_gpio_irq_type(): fix spurious enumeration offset for FGPIO handling
[ARM] 4568/1: fix l2x0 cache invalidate handling of unaligned addresses
| -rw-r--r-- | arch/arm/mach-ep93xx/core.c | 2 | ||||
| -rw-r--r-- | arch/arm/mm/cache-l2x0.c | 12 |
2 files changed, 12 insertions, 2 deletions
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c index 851cc71..70b2c78 100644 --- a/arch/arm/mach-ep93xx/core.c +++ b/arch/arm/mach-ep93xx/core.c @@ -336,7 +336,7 @@ static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type) if (line >= 0 && line < 16) { gpio_line_config(line, GPIO_IN); } else { - gpio_line_config(EP93XX_GPIO_LINE_F(line), GPIO_IN); + gpio_line_config(EP93XX_GPIO_LINE_F(line-16), GPIO_IN); } port = line >> 3; diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index b4e9b73..76b800a 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -57,7 +57,17 @@ static void l2x0_inv_range(unsigned long start, unsigned long end) { unsigned long addr; - start &= ~(CACHE_LINE_SIZE - 1); + if (start & (CACHE_LINE_SIZE - 1)) { + start &= ~(CACHE_LINE_SIZE - 1); + sync_writel(start, L2X0_CLEAN_INV_LINE_PA, 1); + start += CACHE_LINE_SIZE; + } + + if (end & (CACHE_LINE_SIZE - 1)) { + end &= ~(CACHE_LINE_SIZE - 1); + sync_writel(end, L2X0_CLEAN_INV_LINE_PA, 1); + } + for (addr = start; addr < end; addr += CACHE_LINE_SIZE) sync_writel(addr, L2X0_INV_LINE_PA, 1); cache_sync(); |