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author | huisung.kang <hs1218.kang@samsung.com> | 2010-09-04 23:26:19 -0700 |
---|---|---|
committer | Arve Hjønnevåg <arve@android.com> | 2011-11-17 17:45:18 -0800 |
commit | e1c19b26f1df4755c3ad96f3e04270495513a128 (patch) | |
tree | 77ded9bbaff66f121e053f42d19ee30291caab84 | |
parent | f746c4e28ebaa2e7c4aee7cb49cbe54c46e348ab (diff) | |
download | kernel_samsung_crespo-e1c19b26f1df4755c3ad96f3e04270495513a128.zip kernel_samsung_crespo-e1c19b26f1df4755c3ad96f3e04270495513a128.tar.gz kernel_samsung_crespo-e1c19b26f1df4755c3ad96f3e04270495513a128.tar.bz2 |
S5PC11X: PD: Add clock source for power domain
This patch add clock sources related to s5pc11x power domain and
delete codes for cpu version 0.
Change-Id: I31e0b35e70b008b4b6bf9493d39b5caaca75e2e6
Signed-off-by: huisung.kang <hs1218.kang@samsung.com>
-rw-r--r-- | arch/arm/mach-s5pv210/clock.c | 82 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/include/mach/regs-clock.h | 5 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/pm.c | 2 |
3 files changed, 81 insertions, 8 deletions
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c index 82c636b..d7cee0c 100644 --- a/arch/arm/mach-s5pv210/clock.c +++ b/arch/arm/mach-s5pv210/clock.c @@ -176,6 +176,11 @@ static int s5pv210_clk_ip3_ctrl(struct clk *clk, int enable) return s5p_gatectrl(S5P_CLKGATE_IP3, clk, enable); } +static int s5pv210_clk_ip5_ctrl(struct clk *clk, int enable) +{ + return s5p_gatectrl(S5P_CLKGATE_IP5, clk, enable); +} + static int s5pv210_clk_mask0_ctrl(struct clk *clk, int enable) { return s5p_gatectrl(S5P_CLK_SRC_MASK0, clk, enable); @@ -212,6 +217,21 @@ static struct clk clk_sclk_usbphy1 = { .id = -1, }; +static struct clk clk_i2scdclk0 = { + .name = "i2scdclk", + .id = 0, +}; + +static struct clk clk_i2scdclk1 = { + .name = "i2scdclk", + .id = 1, +}; + +static struct clk clk_i2scdclk2 = { + .name = "i2scdclk", + .id = 2, +}; + static struct clk clk_pcmcdclk0 = { .name = "pcmcdclk", .id = -1, @@ -377,6 +397,12 @@ static struct clk init_clocks_off[] = { .enable = s5pv210_clk_ip0_ctrl, .ctrlbit = S5P_CLKGATE_IP0_JPEG, }, { + .name = "dsim", + .id = -1, + .parent = &clk_hclk_dsys.clk, + .enable = s5pv210_clk_ip1_ctrl, + .ctrlbit = (1<<2), + }, { .name = "cfcon", .id = 0, .parent = &clk_hclk_psys.clk, @@ -520,6 +546,42 @@ static struct clk init_clocks_off[] = { .parent = &clk_pclk_psys.clk, .enable = s5pv210_clk_ip3_ctrl, .ctrlbit = S5P_CLKGATE_IP3_PCM0, + }, { + .name = "jpeg", + .id = -1, + .parent = &clk_hclk_dsys.clk, + .enable = s5pv210_clk_ip5_ctrl, + .ctrlbit = (1 << 29), + }, { + .name = "i2c-hdmiphy", + .id = -1, + .parent = &clk_pclk_psys.clk, + .enable = s5pv210_clk_ip3_ctrl, + .ctrlbit = (1 << 11), + }, { + .name = "hdmi", + .id = -1, + .parent = &clk_hclk_dsys.clk, + .enable = s5pv210_clk_ip1_ctrl, + .ctrlbit = (1 << 11), + }, { + .name = "tvenc", + .id = -1, + .parent = &clk_hclk_dsys.clk, + .enable = s5pv210_clk_ip1_ctrl, + .ctrlbit = (1 << 10), + }, { + .name = "mixer", + .id = -1, + .parent = &clk_hclk_dsys.clk, + .enable = s5pv210_clk_ip1_ctrl, + .ctrlbit = (1 << 9), + }, { + .name = "vp", + .id = -1, + .parent = &clk_hclk_dsys.clk, + .enable = s5pv210_clk_ip1_ctrl, + .ctrlbit = (1 << 8), }, }; @@ -571,7 +633,7 @@ static struct clk init_clocks[] = { .ctrlbit = (1 << 26), }, { .name = "mfc", - .id = 4, + .id = -1, .parent = &clk_hclk_msys.clk, .enable = s5pv210_clk_ip0_ctrl, .ctrlbit = (1<<16), @@ -1122,7 +1184,7 @@ static struct clksrc_clk clksrcs[] = { .reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 }, }, { .clk = { - .name = "sclk_g2d", + .name = "sclk_fimg2d", .id = -1, .enable = s5pv210_clk_ip0_ctrl, .ctrlbit = (1 << 12), @@ -1215,6 +1277,18 @@ static struct clksrc_clk clksrcs[] = { }, }; +/* MOUT CSIS */ +static struct clksrc_clk clk_mout_csis = { + .clk = { + .name = "mout_csis", + .id = -1, + .enable = s5pv210_clk_mask0_ctrl, + .ctrlbit = (1 << 6), + }, + .sources = &clkset_group1, + .reg_src = { .reg = S5P_CLK_SRC1, .shift = 24, .size = 4 }, +}; + /* Clock initialisation code */ static struct clksrc_clk *sysclks[] = { &clk_mout_apll, @@ -1235,6 +1309,7 @@ static struct clksrc_clk *sysclks[] = { &clk_sclk_hdmi, &clk_mout_dmc0, &clk_sclk_dmc0, + &clk_mout_csis, &clk_sclk_audio0, &clk_sclk_audio1, &clk_sclk_audio2, @@ -1430,6 +1505,9 @@ static struct clk *clks[] __initdata = { &clk_sclk_hdmiphy, &clk_sclk_usbphy0, &clk_sclk_usbphy1, + &clk_i2scdclk0, + &clk_i2scdclk1, + &clk_i2scdclk2, &clk_pcmcdclk0, &clk_pcmcdclk1, &clk_pcmcdclk2, diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/arch/arm/mach-s5pv210/include/mach/regs-clock.h index 66fbc5d..d5d51cd 100644 --- a/arch/arm/mach-s5pv210/include/mach/regs-clock.h +++ b/arch/arm/mach-s5pv210/include/mach/regs-clock.h @@ -67,12 +67,7 @@ #define S5P_CLKGATE_IP4 S5P_CLKREG(0x470) #define S5P_CLKGATE_BLOCK S5P_CLKREG(0x480) -#if defined(CONFIG_CPU_S5PV210_EVT1) #define S5P_CLKGATE_IP5 S5P_CLKREG(0x484) -#else -#define S5P_CLKGATE_BUS0 S5P_CLKREG(0x484) -#define S5P_CLKGATE_BUS1 S5P_CLKREG(0x488) -#endif #define S5P_CLK_OUT S5P_CLKREG(0x500) /* DIV/MUX STATUS */ diff --git a/arch/arm/mach-s5pv210/pm.c b/arch/arm/mach-s5pv210/pm.c index bfdcb34..f17623b 100644 --- a/arch/arm/mach-s5pv210/pm.c +++ b/arch/arm/mach-s5pv210/pm.c @@ -79,7 +79,7 @@ static struct sleep_save core_save[] = { /* Clock Blcok and Bus gate */ SAVE_ITEM(S5P_CLKGATE_BLOCK), - SAVE_ITEM(S5P_CLKGATE_BUS0), + SAVE_ITEM(S5P_CLKGATE_IP5), /* Clock ETC */ SAVE_ITEM(S5P_CLK_OUT), |