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| author | Anton Vorontsov <avorontsov@ru.mvista.com> | 2009-09-16 01:44:00 +0400 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2009-11-11 21:43:30 -0600 |
| commit | 8c68e2f7885b22f0a63bf087752a46b690d6b6ea (patch) | |
| tree | 5dcb238c4bb85f43ab46d9c33ad3c060824773cf /Documentation/powerpc | |
| parent | 3cfee0aaa1c7767e1b85272a0621e3a78ece7879 (diff) | |
| download | kernel_samsung_crespo-8c68e2f7885b22f0a63bf087752a46b690d6b6ea.zip kernel_samsung_crespo-8c68e2f7885b22f0a63bf087752a46b690d6b6ea.tar.gz kernel_samsung_crespo-8c68e2f7885b22f0a63bf087752a46b690d6b6ea.tar.bz2 | |
powerpc/86xx: Add power management support for MPC8610HPCD boards
This patch adds needed nodes and properties to support suspend/resume
on the MPC8610HPCD boards.
There is a dedicated switch (SW9) that is used to wake up the boards.
By default the SW9 button is routed to IRQ8, but could be re-routed
(via PIXIS) to sreset.
With 'no_console_suspend' kernel command line argument specified, the
board is also able to wakeup upon serial port input.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Scott Wood <scottwood@freescale.com> [dts]
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'Documentation/powerpc')
| -rw-r--r-- | Documentation/powerpc/dts-bindings/fsl/board.txt | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/Documentation/powerpc/dts-bindings/fsl/board.txt b/Documentation/powerpc/dts-bindings/fsl/board.txt index e8b5bc2..39e9415 100644 --- a/Documentation/powerpc/dts-bindings/fsl/board.txt +++ b/Documentation/powerpc/dts-bindings/fsl/board.txt @@ -20,12 +20,16 @@ Required properities: - compatible : should be "fsl,fpga-pixis". - reg : should contain the address and the length of the FPPGA register set. +- interrupt-parent: should specify phandle for the interrupt controller. +- interrupts : should specify event (wakeup) IRQ. Example (MPC8610HPCD): board-control@e8000000 { compatible = "fsl,fpga-pixis"; reg = <0xe8000000 32>; + interrupt-parent = <&mpic>; + interrupts = <8 8>; }; * Freescale BCSR GPIO banks |