aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-s3c64xx
diff options
context:
space:
mode:
authorKukjin Kim <kgene.kim@samsung.com>2010-10-01 20:20:37 +0900
committerKukjin Kim <kgene.kim@samsung.com>2010-10-23 11:52:07 +0900
commit3e9b7261502e78e351fc6a61a9b7241433c779c4 (patch)
tree5c6a6b0c433c3ad83b7c38274542565477601c66 /arch/arm/mach-s3c64xx
parent5a350da428daace38b0762b63d42f4b441e8bad4 (diff)
downloadkernel_samsung_crespo-3e9b7261502e78e351fc6a61a9b7241433c779c4.zip
kernel_samsung_crespo-3e9b7261502e78e351fc6a61a9b7241433c779c4.tar.gz
kernel_samsung_crespo-3e9b7261502e78e351fc6a61a9b7241433c779c4.tar.bz2
ARM: S3C64XX: 2nd Change to using s3c_gpio_cfgrange_nopull()
This patch changes code setting special-function and no pull-up to use the s3c_gpio_cfgrange_nopull() wrapper. NOTE: This is for missed things from the previous patch. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c64xx')
-rw-r--r--arch/arm/mach-s3c64xx/setup-fb-24bpp.c7
-rw-r--r--arch/arm/mach-s3c64xx/setup-keypad.c6
2 files changed, 4 insertions, 9 deletions
diff --git a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
index 3b0dd12..8f30911 100644
--- a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
+++ b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
@@ -23,9 +23,6 @@
extern void s3c64xx_fb_gpio_setup_24bpp(void)
{
- s3c_gpio_cfgall_range(S3C64XX_GPI(0), 16,
- S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE);
-
- s3c_gpio_cfgall_range(S3C64XX_GPJ(0), 12,
- S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE);
+ s3c_gpio_cfgrange_nopull(S3C64XX_GPI(0), 16, S3C_GPIO_SFN(2));
+ s3c_gpio_cfgrange_nopull(S3C64XX_GPJ(0), 12, S3C_GPIO_SFN(2));
}
diff --git a/arch/arm/mach-s3c64xx/setup-keypad.c b/arch/arm/mach-s3c64xx/setup-keypad.c
index cc9b09c..d1fd722 100644
--- a/arch/arm/mach-s3c64xx/setup-keypad.c
+++ b/arch/arm/mach-s3c64xx/setup-keypad.c
@@ -16,10 +16,8 @@
void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols)
{
/* Set all the necessary GPK pins to special-function 3: KP_ROW[x] */
- s3c_gpio_cfgall_range(S3C64XX_GPK(8), 8 + rows,
- S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE);
+ s3c_gpio_cfgrange_nopull(S3C64XX_GPK(8), 8 + rows, S3C_GPIO_SFN(3));
/* Set all the necessary GPL pins to special-function 3: KP_COL[x] */
- s3c_gpio_cfgall_range(S3C64XX_GPL(0), cols,
- S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE);
+ s3c_gpio_cfgrange_nopull(S3C64XX_GPL(0), cols, S3C_GPIO_SFN(3));
}