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author | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-10-28 12:27:34 +0100 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-10-28 12:27:34 +0100 |
commit | f9cef506815386df4bd7e463b59e0a0984ce0355 (patch) | |
tree | b26a202b2f0472e3ebe889012312b115917717f9 /arch/arm/mach-s5p64x0 | |
parent | 9ae21ca362679757786f5abe556c7943e9001426 (diff) | |
parent | cbff3eb3e6e3c618583a7435f87c1548aa12b0ad (diff) | |
download | kernel_samsung_crespo-f9cef506815386df4bd7e463b59e0a0984ce0355.zip kernel_samsung_crespo-f9cef506815386df4bd7e463b59e0a0984ce0355.tar.gz kernel_samsung_crespo-f9cef506815386df4bd7e463b59e0a0984ce0355.tar.bz2 |
Merge branch 'for-rmk' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into devel-stable
Conflicts:
arch/arm/mach-s3c64xx/dev-audio.c
Diffstat (limited to 'arch/arm/mach-s5p64x0')
-rw-r--r-- | arch/arm/mach-s5p64x0/Kconfig | 2 | ||||
-rw-r--r-- | arch/arm/mach-s5p64x0/clock-s5p6440.c | 19 | ||||
-rw-r--r-- | arch/arm/mach-s5p64x0/clock-s5p6450.c | 19 | ||||
-rw-r--r-- | arch/arm/mach-s5p64x0/clock.c | 18 | ||||
-rw-r--r-- | arch/arm/mach-s5p64x0/dev-audio.c | 26 | ||||
-rw-r--r-- | arch/arm/mach-s5p64x0/dev-spi.c | 38 | ||||
-rw-r--r-- | arch/arm/mach-s5p64x0/dma.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-s5p64x0/include/mach/regs-clock.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-s5p64x0/include/mach/vmalloc.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-s5p64x0/setup-i2c0.c | 12 | ||||
-rw-r--r-- | arch/arm/mach-s5p64x0/setup-i2c1.c | 12 |
11 files changed, 55 insertions, 97 deletions
diff --git a/arch/arm/mach-s5p64x0/Kconfig b/arch/arm/mach-s5p64x0/Kconfig index fbcae93..164d278 100644 --- a/arch/arm/mach-s5p64x0/Kconfig +++ b/arch/arm/mach-s5p64x0/Kconfig @@ -9,14 +9,12 @@ if ARCH_S5P64X0 config CPU_S5P6440 bool - select PLAT_S5P select S3C_PL330_DMA help Enable S5P6440 CPU support config CPU_S5P6450 bool - select PLAT_S5P select S3C_PL330_DMA help Enable S5P6450 CPU support diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c index f93dcd8..e4883dc 100644 --- a/arch/arm/mach-s5p64x0/clock-s5p6440.c +++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c @@ -79,13 +79,16 @@ static int s5p6440_epll_set_rate(struct clk *clk, unsigned long rate) __raw_writel(epll_con, S5P64X0_EPLL_CON); __raw_writel(epll_con_k, S5P64X0_EPLL_CON_K); + printk(KERN_WARNING "EPLL Rate changes from %lu to %lu\n", + clk->rate, rate); + clk->rate = rate; return 0; } static struct clk_ops s5p6440_epll_ops = { - .get_rate = s5p64x0_epll_get_rate, + .get_rate = s5p_epll_get_rate, .set_rate = s5p6440_epll_set_rate, }; @@ -150,6 +153,12 @@ static struct clk init_clocks_disable[] = { .enable = s5p64x0_hclk0_ctrl, .ctrlbit = (1 << 8), }, { + .name = "pdma", + .id = -1, + .parent = &clk_hclk_low.clk, + .enable = s5p64x0_hclk0_ctrl, + .ctrlbit = (1 << 12), + }, { .name = "hsmmc", .id = 0, .parent = &clk_hclk_low.clk, @@ -331,12 +340,6 @@ static struct clk init_clocks[] = { .enable = s5p64x0_hclk0_ctrl, .ctrlbit = (1 << 21), }, { - .name = "dma", - .id = -1, - .parent = &clk_hclk_low.clk, - .enable = s5p64x0_hclk0_ctrl, - .ctrlbit = (1 << 12), - }, { .name = "uart", .id = 0, .parent = &clk_pclk_low.clk, @@ -548,7 +551,7 @@ void __init_or_cpufreq s5p6440_setup_clocks(void) /* Set S5P6440 functions for clk_fout_epll */ - clk_fout_epll.enable = s5p64x0_epll_enable; + clk_fout_epll.enable = s5p_epll_enable; clk_fout_epll.ops = &s5p6440_epll_ops; clk_48m.enable = s5p64x0_clk48m_ctrl; diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c index f9afb05..7dbf3c9 100644 --- a/arch/arm/mach-s5p64x0/clock-s5p6450.c +++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c @@ -80,13 +80,16 @@ static int s5p6450_epll_set_rate(struct clk *clk, unsigned long rate) __raw_writel(epll_con, S5P64X0_EPLL_CON); __raw_writel(epll_con_k, S5P64X0_EPLL_CON_K); + printk(KERN_WARNING "EPLL Rate changes from %lu to %lu\n", + clk->rate, rate); + clk->rate = rate; return 0; } static struct clk_ops s5p6450_epll_ops = { - .get_rate = s5p64x0_epll_get_rate, + .get_rate = s5p_epll_get_rate, .set_rate = s5p6450_epll_set_rate, }; @@ -186,6 +189,12 @@ static struct clk init_clocks_disable[] = { .enable = s5p64x0_hclk0_ctrl, .ctrlbit = (1 << 3), }, { + .name = "pdma", + .id = -1, + .parent = &clk_hclk_low.clk, + .enable = s5p64x0_hclk0_ctrl, + .ctrlbit = (1 << 12), + }, { .name = "hsmmc", .id = 0, .parent = &clk_hclk_low.clk, @@ -283,12 +292,6 @@ static struct clk init_clocks[] = { .enable = s5p64x0_hclk0_ctrl, .ctrlbit = (1 << 21), }, { - .name = "dma", - .id = -1, - .parent = &clk_hclk_low.clk, - .enable = s5p64x0_hclk0_ctrl, - .ctrlbit = (1 << 12), - }, { .name = "uart", .id = 0, .parent = &clk_pclk_low.clk, @@ -581,7 +584,7 @@ void __init_or_cpufreq s5p6450_setup_clocks(void) /* Set S5P6450 functions for clk_fout_epll */ - clk_fout_epll.enable = s5p64x0_epll_enable; + clk_fout_epll.enable = s5p_epll_enable; clk_fout_epll.ops = &s5p6450_epll_ops; clk_48m.enable = s5p64x0_clk48m_ctrl; diff --git a/arch/arm/mach-s5p64x0/clock.c b/arch/arm/mach-s5p64x0/clock.c index 523ba80..b52c6e2 100644 --- a/arch/arm/mach-s5p64x0/clock.c +++ b/arch/arm/mach-s5p64x0/clock.c @@ -73,24 +73,6 @@ static const u32 clock_table[][3] = { {L2 * 1000, (3 << ARM_DIV_RATIO_SHIFT), (0 << S5P64X0_CLKDIV0_HCLK_SHIFT)}, }; -int s5p64x0_epll_enable(struct clk *clk, int enable) -{ - unsigned int ctrlbit = clk->ctrlbit; - unsigned int epll_con = __raw_readl(S5P64X0_EPLL_CON) & ~ctrlbit; - - if (enable) - __raw_writel(epll_con | ctrlbit, S5P64X0_EPLL_CON); - else - __raw_writel(epll_con, S5P64X0_EPLL_CON); - - return 0; -} - -unsigned long s5p64x0_epll_get_rate(struct clk *clk) -{ - return clk->rate; -} - unsigned long s5p64x0_armclk_get_rate(struct clk *clk) { unsigned long rate = clk_get_rate(clk->parent); diff --git a/arch/arm/mach-s5p64x0/dev-audio.c b/arch/arm/mach-s5p64x0/dev-audio.c index fa097bd..396bacc 100644 --- a/arch/arm/mach-s5p64x0/dev-audio.c +++ b/arch/arm/mach-s5p64x0/dev-audio.c @@ -24,13 +24,8 @@ static int s5p6440_cfg_i2s(struct platform_device *pdev) /* configure GPIO for i2s port */ switch (pdev->id) { case -1: - s3c_gpio_cfgpin(S5P6440_GPR(4), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5P6440_GPR(5), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(5)); + s3c_gpio_cfgpin_range(S5P6440_GPR(4), 5, S3C_GPIO_SFN(5)); + s3c_gpio_cfgpin_range(S5P6440_GPR(13), 2, S3C_GPIO_SFN(5)); break; default: @@ -47,13 +42,9 @@ static int s5p6450_cfg_i2s(struct platform_device *pdev) switch (pdev->id) { case -1: s3c_gpio_cfgpin(S5P6450_GPB(4), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5P6450_GPR(4), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5P6450_GPR(5), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5P6450_GPR(6), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5P6450_GPR(7), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5P6450_GPR(8), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5P6450_GPR(13), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5P6450_GPR(14), S3C_GPIO_SFN(5)); + s3c_gpio_cfgpin_range(S5P6450_GPR(4), 5, S3C_GPIO_SFN(5)); + s3c_gpio_cfgpin_range(S5P6450_GPR(13), 2, S3C_GPIO_SFN(5)); + break; default: @@ -116,11 +107,8 @@ static int s5p6440_pcm_cfg_gpio(struct platform_device *pdev) { switch (pdev->id) { case 0: - s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5P6440_GPR(6), 3, S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin_range(S5P6440_GPR(13), 2, S3C_GPIO_SFN(2)); break; default: diff --git a/arch/arm/mach-s5p64x0/dev-spi.c b/arch/arm/mach-s5p64x0/dev-spi.c index 5b69ec4..e78ee18 100644 --- a/arch/arm/mach-s5p64x0/dev-spi.c +++ b/arch/arm/mach-s5p64x0/dev-spi.c @@ -39,23 +39,15 @@ static char *s5p64x0_spi_src_clks[] = { */ static int s5p6440_spi_cfg_gpio(struct platform_device *pdev) { + unsigned int base; + switch (pdev->id) { case 0: - s3c_gpio_cfgpin(S5P6440_GPC(0), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6440_GPC(1), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6440_GPC(2), S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5P6440_GPC(0), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5P6440_GPC(1), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5P6440_GPC(2), S3C_GPIO_PULL_UP); + base = S5P6440_GPC(0); break; case 1: - s3c_gpio_cfgpin(S5P6440_GPC(4), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6440_GPC(5), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6440_GPC(6), S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5P6440_GPC(4), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5P6440_GPC(5), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5P6440_GPC(6), S3C_GPIO_PULL_UP); + base = S5P6440_GPC(4); break; default: @@ -63,28 +55,23 @@ static int s5p6440_spi_cfg_gpio(struct platform_device *pdev) return -EINVAL; } + s3c_gpio_cfgall_range(base, 3, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); + return 0; } static int s5p6450_spi_cfg_gpio(struct platform_device *pdev) { + unsigned int base; + switch (pdev->id) { case 0: - s3c_gpio_cfgpin(S5P6450_GPC(0), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6450_GPC(1), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6450_GPC(2), S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5P6450_GPC(0), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5P6450_GPC(1), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5P6450_GPC(2), S3C_GPIO_PULL_UP); + base = S5P6450_GPC(0); break; case 1: - s3c_gpio_cfgpin(S5P6450_GPC(4), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6450_GPC(5), S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin(S5P6450_GPC(6), S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5P6450_GPC(4), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5P6450_GPC(5), S3C_GPIO_PULL_UP); - s3c_gpio_setpull(S5P6450_GPC(6), S3C_GPIO_PULL_UP); + base = S5P6450_GPC(4); break; default: @@ -92,6 +79,9 @@ static int s5p6450_spi_cfg_gpio(struct platform_device *pdev) return -EINVAL; } + s3c_gpio_cfgall_range(base, 3, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); + return 0; } diff --git a/arch/arm/mach-s5p64x0/dma.c b/arch/arm/mach-s5p64x0/dma.c index 29a8c24..d7ad944 100644 --- a/arch/arm/mach-s5p64x0/dma.c +++ b/arch/arm/mach-s5p64x0/dma.c @@ -122,7 +122,7 @@ static struct s3c_pl330_platdata s5p6450_pdma_pdata = { static struct platform_device s5p64x0_device_pdma = { .name = "s3c-pl330", - .id = 0, + .id = -1, .num_resources = ARRAY_SIZE(s5p64x0_pdma_resource), .resource = s5p64x0_pdma_resource, .dev = { diff --git a/arch/arm/mach-s5p64x0/include/mach/regs-clock.h b/arch/arm/mach-s5p64x0/include/mach/regs-clock.h index 58e1bc8..a133f22 100644 --- a/arch/arm/mach-s5p64x0/include/mach/regs-clock.h +++ b/arch/arm/mach-s5p64x0/include/mach/regs-clock.h @@ -60,4 +60,6 @@ #define ARM_DIV_RATIO_SHIFT 0 #define ARM_DIV_MASK (0xF << ARM_DIV_RATIO_SHIFT) +#define S5P_EPLL_CON S5P64X0_EPLL_CON + #endif /* __ASM_ARCH_REGS_CLOCK_H */ diff --git a/arch/arm/mach-s5p64x0/include/mach/vmalloc.h b/arch/arm/mach-s5p64x0/include/mach/vmalloc.h index 97a9df3..38dcc71 100644 --- a/arch/arm/mach-s5p64x0/include/mach/vmalloc.h +++ b/arch/arm/mach-s5p64x0/include/mach/vmalloc.h @@ -15,6 +15,6 @@ #ifndef __ASM_ARCH_VMALLOC_H #define __ASM_ARCH_VMALLOC_H -#define VMALLOC_END 0xE0000000UL +#define VMALLOC_END 0xF6000000UL #endif /* __ASM_ARCH_VMALLOC_H */ diff --git a/arch/arm/mach-s5p64x0/setup-i2c0.c b/arch/arm/mach-s5p64x0/setup-i2c0.c index dc4cc65..46b4639 100644 --- a/arch/arm/mach-s5p64x0/setup-i2c0.c +++ b/arch/arm/mach-s5p64x0/setup-i2c0.c @@ -25,18 +25,14 @@ struct platform_device; /* don't need the contents */ void s5p6440_i2c0_cfg_gpio(struct platform_device *dev) { - s3c_gpio_cfgpin(S5P6440_GPB(5), S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5P6440_GPB(5), S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(S5P6440_GPB(6), S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5P6440_GPB(6), S3C_GPIO_PULL_UP); + s3c_gpio_cfgall_range(S5P6440_GPB(5), 2, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); } void s5p6450_i2c0_cfg_gpio(struct platform_device *dev) { - s3c_gpio_cfgpin(S5P6450_GPB(5), S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5P6450_GPB(5), S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(S5P6450_GPB(6), S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5P6450_GPB(6), S3C_GPIO_PULL_UP); + s3c_gpio_cfgall_range(S5P6450_GPB(5), 2, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); } void s3c_i2c0_cfg_gpio(struct platform_device *dev) { } diff --git a/arch/arm/mach-s5p64x0/setup-i2c1.c b/arch/arm/mach-s5p64x0/setup-i2c1.c index 2edd791..6ad3b98 100644 --- a/arch/arm/mach-s5p64x0/setup-i2c1.c +++ b/arch/arm/mach-s5p64x0/setup-i2c1.c @@ -25,18 +25,14 @@ struct platform_device; /* don't need the contents */ void s5p6440_i2c1_cfg_gpio(struct platform_device *dev) { - s3c_gpio_cfgpin(S5P6440_GPR(9), S3C_GPIO_SFN(6)); - s3c_gpio_setpull(S5P6440_GPR(9), S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(S5P6440_GPR(10), S3C_GPIO_SFN(6)); - s3c_gpio_setpull(S5P6440_GPR(10), S3C_GPIO_PULL_UP); + s3c_gpio_cfgall_range(S5P6440_GPR(9), 2, + S3C_GPIO_SFN(6), S3C_GPIO_PULL_UP); } void s5p6450_i2c1_cfg_gpio(struct platform_device *dev) { - s3c_gpio_cfgpin(S5P6450_GPR(9), S3C_GPIO_SFN(6)); - s3c_gpio_setpull(S5P6450_GPR(9), S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(S5P6450_GPR(10), S3C_GPIO_SFN(6)); - s3c_gpio_setpull(S5P6450_GPR(10), S3C_GPIO_PULL_UP); + s3c_gpio_cfgall_range(S5P6450_GPR(9), 2, + S3C_GPIO_SFN(6), S3C_GPIO_PULL_UP); } void s3c_i2c1_cfg_gpio(struct platform_device *dev) { } |