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| author | Andre Przywara <andre.przywara@amd.com> | 2011-03-30 15:01:45 +0200 |
|---|---|---|
| committer | Avi Kivity <avi@redhat.com> | 2011-04-06 13:15:55 +0300 |
| commit | 20800bc940af671257abc97ad362abe3c21ddd50 (patch) | |
| tree | 4e7e725a5acbcbc9125bb792637658a08dc11ead /arch/x86 | |
| parent | 0857b9e95c1af8bfe84630ef6747b9d4d61de4c6 (diff) | |
| download | kernel_samsung_crespo-20800bc940af671257abc97ad362abe3c21ddd50.zip kernel_samsung_crespo-20800bc940af671257abc97ad362abe3c21ddd50.tar.gz kernel_samsung_crespo-20800bc940af671257abc97ad362abe3c21ddd50.tar.bz2 | |
KVM: fix XSAVE bit scanning
When KVM scans the 0xD CPUID leaf for propagating the XSAVE save area
leaves, it assumes that the leaves are contigious and stops at the
first zero one. On AMD hardware there is a gap, though, as LWP uses
leaf 62 to announce it's state save area.
So lets iterate through all 64 possible leaves and simply skip zero
ones to also cover later features.
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
Diffstat (limited to 'arch/x86')
| -rw-r--r-- | arch/x86/kvm/x86.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 58f517b..4a1ba05 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -2395,9 +2395,9 @@ static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, int i; entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX; - for (i = 1; *nent < maxnent; ++i) { - if (entry[i - 1].eax == 0 && i != 2) - break; + for (i = 1; *nent < maxnent && i < 64; ++i) { + if (entry[i].eax == 0) + continue; do_cpuid_1_ent(&entry[i], function, i); entry[i].flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX; |