diff options
| author | Borislav Petkov <borislav.petkov@amd.com> | 2010-07-02 17:02:43 +0200 |
|---|---|---|
| committer | Borislav Petkov <borislav.petkov@amd.com> | 2010-07-02 17:32:34 +0200 |
| commit | 41c310447fe06bcedc22b75752c18b60e0b9521b (patch) | |
| tree | 20839d92f95d88d70813d9ef81058ba2c1a62a7c /drivers/edac | |
| parent | 7e27d6e778cd87b6f2415515d7127eba53fe5d02 (diff) | |
| download | kernel_samsung_crespo-41c310447fe06bcedc22b75752c18b60e0b9521b.zip kernel_samsung_crespo-41c310447fe06bcedc22b75752c18b60e0b9521b.tar.gz kernel_samsung_crespo-41c310447fe06bcedc22b75752c18b60e0b9521b.tar.bz2 | |
amd64_edac: Fix syndrome calculation on K8
When calculating the DCT channel from the syndrome we need to know the
syndrome type (x4 vs x8). On F10h, this is read out from extended PCI
cfg space register F3x180 while on K8 we only support x4 syndromes and
don't have extended PCI config space anyway.
Make the code accessing F3x180 F10h only and fall back to x4 syndromes
on everything else.
Cc: <stable@kernel.org> # .33.x .34.x
Reported-by: Jeffrey Merkey <jeffmerkey@gmail.com>
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Diffstat (limited to 'drivers/edac')
| -rw-r--r-- | drivers/edac/amd64_edac.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index cf17dbb..ac9f798 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -1958,20 +1958,20 @@ static int get_channel_from_ecc_syndrome(struct mem_ctl_info *mci, u16 syndrome) u32 value = 0; int err_sym = 0; - amd64_read_pci_cfg(pvt->misc_f3_ctl, 0x180, &value); + if (boot_cpu_data.x86 == 0x10) { - /* F3x180[EccSymbolSize]=1, x8 symbols */ - if (boot_cpu_data.x86 == 0x10 && - boot_cpu_data.x86_model > 7 && - value & BIT(25)) { - err_sym = decode_syndrome(syndrome, x8_vectors, - ARRAY_SIZE(x8_vectors), 8); - return map_err_sym_to_channel(err_sym, 8); - } else { - err_sym = decode_syndrome(syndrome, x4_vectors, - ARRAY_SIZE(x4_vectors), 4); - return map_err_sym_to_channel(err_sym, 4); + amd64_read_pci_cfg(pvt->misc_f3_ctl, 0x180, &value); + + /* F3x180[EccSymbolSize]=1 => x8 symbols */ + if (boot_cpu_data.x86_model > 7 && + value & BIT(25)) { + err_sym = decode_syndrome(syndrome, x8_vectors, + ARRAY_SIZE(x8_vectors), 8); + return map_err_sym_to_channel(err_sym, 8); + } } + err_sym = decode_syndrome(syndrome, x4_vectors, ARRAY_SIZE(x4_vectors), 4); + return map_err_sym_to_channel(err_sym, 4); } /* |