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authorJP Abgrall <jpa@google.com>2012-04-24 21:45:20 -0700
committerJP Abgrall <jpa@google.com>2012-04-24 21:45:20 -0700
commit10add970b62d2276541af9e5fb0581d6d8434db4 (patch)
treeafd79e8507c5fa243c044a6963072b6a6d0f059b /drivers/gpu/drm/radeon/rs600.c
parent9cea9c804af57f8538dc910e24c407c81e496e51 (diff)
parent66510aa1148e3457e7d46e0a2582dac7c591b95d (diff)
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Merge remote-tracking branch 'common/android-3.0' into android-samsung-30-wip-mergedown
* common/android-3.0: (1178 commits) cpufreq: interactive: remove unused target_validate_time_in_idle cpufreq: interactive: Boost frequency on touchscreen input cpufreq: Separate speed target revalidate time and initial set time cpufreq: interactive: based hispeed bump on target freq, not actual cpufreq: interactive: adjust code and documentation to match cpufreq: interactive: configurable delay before raising above hispeed sync: add poll support sw_sync: add fill_driver_data support sync: add ioctl to get fence data sw_sync: add debug support sync: add debugfs support sync: add timestamps to sync_pts sw_sync: add cpu based sync driver sync: Add synchronization framework Linux 3.0.28 Bluetooth: Fix l2cap conn failures for ssp devices TOMOYO: Fix mount flags checking order. iommu/amd: Make sure IOMMU interrupts are re-enabled on resume cred: copy_process() should clear child->replacement_session_keyring ASoC: ak4642: fixup: mute needs +1 step ... Conflicts: mm/compaction.c Change-Id: I3dc59225d2435eddbed0c639155179e580891ac8 Signed-off-by: JP Abgrall <jpa@google.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/rs600.c')
-rw-r--r--drivers/gpu/drm/radeon/rs600.c16
1 files changed, 10 insertions, 6 deletions
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index 1f5850e..2026c2d 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -62,6 +62,7 @@ u32 rs600_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base)
{
struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id];
u32 tmp = RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset);
+ int i;
/* Lock the graphics update lock */
tmp |= AVIVO_D1GRPH_UPDATE_LOCK;
@@ -74,7 +75,11 @@ u32 rs600_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base)
(u32)crtc_base);
/* Wait for update_pending to go high. */
- while (!(RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) & AVIVO_D1GRPH_SURFACE_UPDATE_PENDING));
+ for (i = 0; i < rdev->usec_timeout; i++) {
+ if (RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) & AVIVO_D1GRPH_SURFACE_UPDATE_PENDING)
+ break;
+ udelay(1);
+ }
DRM_DEBUG("Update pending now high. Unlocking vupdate_lock.\n");
/* Unlock the lock, so double-buffering can take place inside vblank */
@@ -287,6 +292,7 @@ void rs600_hpd_init(struct radeon_device *rdev)
default:
break;
}
+ radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
}
if (rdev->irq.installed)
rs600_irq_set(rdev);
@@ -318,10 +324,10 @@ void rs600_hpd_fini(struct radeon_device *rdev)
void rs600_bm_disable(struct radeon_device *rdev)
{
- u32 tmp;
+ u16 tmp;
/* disable bus mastering */
- pci_read_config_word(rdev->pdev, 0x4, (u16*)&tmp);
+ pci_read_config_word(rdev->pdev, 0x4, &tmp);
pci_write_config_word(rdev->pdev, 0x4, tmp & 0xFFFB);
mdelay(1);
}
@@ -692,9 +698,7 @@ int rs600_irq_process(struct radeon_device *rdev)
WREG32(RADEON_BUS_CNTL, msi_rearm | RS600_MSI_REARM);
break;
default:
- msi_rearm = RREG32(RADEON_MSI_REARM_EN) & ~RV370_MSI_REARM_EN;
- WREG32(RADEON_MSI_REARM_EN, msi_rearm);
- WREG32(RADEON_MSI_REARM_EN, msi_rearm | RV370_MSI_REARM_EN);
+ WREG32(RADEON_MSI_REARM_EN, RV370_MSI_REARM_EN);
break;
}
}