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| author | Alistair Strachan <alistair.strachan@imgtec.com> | 2012-06-14 10:21:54 +0100 |
|---|---|---|
| committer | Android Partner Code Review <android-gerrit-partner@google.com> | 2012-06-14 21:38:17 -0700 |
| commit | 5a7b9539f5c1a9bb35131014907929a2da3fa723 (patch) | |
| tree | 5305f14ebcef9b29dce7ea9a16959653e4185748 /drivers/gpu | |
| parent | ca5c535e1e9cae41831adae5a29a76f848f7f792 (diff) | |
| download | kernel_samsung_crespo-5a7b9539f5c1a9bb35131014907929a2da3fa723.zip kernel_samsung_crespo-5a7b9539f5c1a9bb35131014907929a2da3fa723.tar.gz kernel_samsung_crespo-5a7b9539f5c1a9bb35131014907929a2da3fa723.tar.bz2 | |
gpu: pvr: Fix a bug that prevented MMU PTs from being dumped.
DumpPT already had a static inline if PT_DEBUG or PT_DUMP
weren't defined, so it shouldn't have been #ifdef guarded.
Furthermore, PT_DEBUG isn't enabled so DumpPT would not have been
called to dump the page tables in one case. This is incorrect as
it should have been called if PT_DUMP was enabled.
Change-Id: I4a0d2a3665b7586a5dfa4390098df4edb6edfe74
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/pvr/sgx/mmu.c | 8 |
1 files changed, 1 insertions, 7 deletions
diff --git a/drivers/gpu/pvr/sgx/mmu.c b/drivers/gpu/pvr/sgx/mmu.c index d4c7e0b..c069bd8 100644 --- a/drivers/gpu/pvr/sgx/mmu.c +++ b/drivers/gpu/pvr/sgx/mmu.c @@ -200,8 +200,8 @@ static IMG_VOID PageTest(IMG_VOID* pMem, IMG_DEV_PHYADDR sDevPAddr); #endif #define PT_DUMP 1 - #define PT_DEBUG 0 + #if (PT_DEBUG || PT_DUMP) && defined(PVRSRV_NEED_PVR_DPF) static IMG_VOID DumpPT(MMU_PT_INFO *psPTInfoList) { @@ -748,14 +748,10 @@ _DeferredFreePageTable (MMU_HEAP *pMMUHeap, IMG_UINT32 ui32PTIndex, IMG_BOOL bOS ppsPTInfoList = &pMMUHeap->psMMUContext->apsPTInfoList[ui32PDIndex]; { -#if PT_DEBUG if(ppsPTInfoList[ui32PTIndex] && ppsPTInfoList[ui32PTIndex]->ui32ValidPTECount > 0) { DumpPT(ppsPTInfoList[ui32PTIndex]); - } -#endif - PVR_ASSERT(ppsPTInfoList[ui32PTIndex] == IMG_NULL || ppsPTInfoList[ui32PTIndex]->ui32ValidPTECount == 0); } @@ -2973,9 +2969,7 @@ MMU_MapPage (MMU_HEAP *pMMUHeap, ui32Index )); PVR_DPF((PVR_DBG_ERROR, "MMU_MapPage: Page table entry value: 0x%08X", uTmp)); PVR_DPF((PVR_DBG_ERROR, "MMU_MapPage: Physical page to map: 0x%08X", DevPAddr.uiAddr)); -#if PT_DUMP DumpPT(ppsPTInfoList[0]); -#endif } #if !defined(FIX_HW_BRN_31620) PVR_ASSERT((uTmp & SGX_MMU_PTE_VALID) == 0); |