diff options
author | kyoungho.yun <kyoungho.yun@samsung.com> | 2011-01-21 16:36:15 +0900 |
---|---|---|
committer | Arve Hjønnevåg <arve@android.com> | 2011-11-17 17:53:02 -0800 |
commit | 543a4785c2ef7f891ca4b265637675f7885b24c9 (patch) | |
tree | 88cd81c49a8c6aefbdd123d618a924c212479937 /drivers/media | |
parent | 8ee3b651c6c63847669bfc22e14fc0fd162307ed (diff) | |
download | kernel_samsung_crespo-543a4785c2ef7f891ca4b265637675f7885b24c9.zip kernel_samsung_crespo-543a4785c2ef7f891ca4b265637675f7885b24c9.tar.gz kernel_samsung_crespo-543a4785c2ef7f891ca4b265637675f7885b24c9.tar.bz2 |
S5PC11X: CAMERA: support QCIF, update set file
1. update set file
2. add QCIF mode recording routine
3. add FPS_auto for supporting frame rate changing
Change-Id: I6cbd5551d5bab49cbbdbb766582f9102cf5a6097
Signed-off-by: kyoungho.yun <kyoungho.yun@samsung.com>
Diffstat (limited to 'drivers/media')
-rwxr-xr-x | drivers/media/video/s5ka3dfx.c | 86 | ||||
-rwxr-xr-x[-rw-r--r--] | drivers/media/video/s5ka3dfx.h | 190 |
2 files changed, 255 insertions, 21 deletions
diff --git a/drivers/media/video/s5ka3dfx.c b/drivers/media/video/s5ka3dfx.c index 40d3215..8a37f9f 100755 --- a/drivers/media/video/s5ka3dfx.c +++ b/drivers/media/video/s5ka3dfx.c @@ -88,6 +88,7 @@ struct s5ka3dfx_state { }; enum { + S5KA3DFX_PREVIEW_QCIF, S5KA3DFX_PREVIEW_VGA, }; @@ -98,6 +99,7 @@ struct s5ka3dfx_enum_framesize { }; struct s5ka3dfx_enum_framesize s5ka3dfx_framesize_list[] = { + { S5KA3DFX_PREVIEW_QCIF, 176, 144 }, { S5KA3DFX_PREVIEW_VGA, 640, 480 } }; @@ -175,6 +177,7 @@ static struct s5ka3dfx_regset_table fps_table[] = { S5KA3DFX_REGSET_TABLE_ELEMENT(0, s5ka3dfx_fps_7), S5KA3DFX_REGSET_TABLE_ELEMENT(1, s5ka3dfx_fps_10), S5KA3DFX_REGSET_TABLE_ELEMENT(2, s5ka3dfx_fps_15), + S5KA3DFX_REGSET_TABLE_ELEMENT(3, s5ka3dfx_fps_auto), }; static struct s5ka3dfx_regset_table blur_vt[] = { @@ -207,6 +210,10 @@ static struct s5ka3dfx_regset_table init_vt_reg[] = { S5KA3DFX_REGSET_TABLE_ELEMENT(0, s5ka3dfx_init_vt_reg), }; +static struct s5ka3dfx_regset_table frame_size[] = { + S5KA3DFX_REGSET_TABLE_ELEMENT(0, s5ka3dfx_QCIF), + S5KA3DFX_REGSET_TABLE_ELEMENT(1, s5ka3dfx_Return_VGA), +}; static int s5ka3dfx_reset(struct v4l2_subdev *sd) { struct i2c_client *client = v4l2_get_subdevdata(sd); @@ -332,6 +339,27 @@ static int s5ka3dfx_set_parameter(struct v4l2_subdev *sd, return err; } +static int s5ka3dfx_set_preview_start(struct v4l2_subdev *sd) +{ + int err; + struct s5ka3dfx_state *state = + container_of(sd, struct s5ka3dfx_state, sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + + if (!state->pix.width || !state->pix.height) + return -EINVAL; + + err = s5ka3dfx_set_from_table(sd, "frame_size", frame_size, + ARRAY_SIZE(frame_size), state->framesize_index); + if (err < 0) { + dev_err(&client->dev, + "%s: failed: Could not set preview size\n", + __func__); + return -EIO; + } + + return 0; +} static struct v4l2_queryctrl s5ka3dfx_controls[] = { /* Add here if needed */ }; @@ -413,11 +441,60 @@ static int s5ka3dfx_g_fmt(struct v4l2_subdev *sd, struct v4l2_format *fmt) return err; } +static void s5ka3dfx_set_framesize(struct v4l2_subdev *sd, + const struct s5ka3dfx_enum_framesize *frmsize, + int frmsize_count) +{ + struct s5ka3dfx_state *state = + container_of(sd, struct s5ka3dfx_state, sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); + const struct s5ka3dfx_enum_framesize *last_frmsize = + &frmsize[frmsize_count - 1]; + + dev_dbg(&client->dev, "%s: Requested Res: %dx%d\n", __func__, + state->pix.width, state->pix.height); + + do { + if (frmsize->width == state->pix.width && + frmsize->height == state->pix.height) { + break; + } + + frmsize++; + } while (frmsize <= last_frmsize); + + if (frmsize > last_frmsize) + frmsize = last_frmsize; + + state->pix.width = frmsize->width; + state->pix.height = frmsize->height; + state->framesize_index = frmsize->index; + + dev_dbg(&client->dev, "%s: Preview Res Set: %dx%d, index %d\n", + __func__, state->pix.width, state->pix.height, + state->framesize_index); +} static int s5ka3dfx_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *fmt) { + struct s5ka3dfx_state *state = + container_of(sd, struct s5ka3dfx_state, sd); + struct i2c_client *client = v4l2_get_subdevdata(sd); int err = 0; - pr_debug("%s is called...\n", __func__); + if (fmt->fmt.pix.pixelformat == V4L2_PIX_FMT_JPEG && + fmt->fmt.pix.colorspace != V4L2_COLORSPACE_JPEG) { + dev_dbg(&client->dev, + "%s: mismatch in pixelformat and colorspace\n", + __func__); + return -EINVAL; + } + + state->pix.width = fmt->fmt.pix.width; + state->pix.height = fmt->fmt.pix.height; + state->pix.pixelformat = fmt->fmt.pix.pixelformat; + + s5ka3dfx_set_framesize(sd, s5ka3dfx_framesize_list, + ARRAY_SIZE(s5ka3dfx_framesize_list)); return err; } @@ -654,6 +731,10 @@ static int s5ka3dfx_set_frame_rate(struct v4l2_subdev *sd, pr_debug("state->vt_mode : %d\n", state->vt_mode); switch (ctrl->value) { + case 0: + fps_index = 3; + break; + case 7: fps_index = 0; break; @@ -678,6 +759,7 @@ static int s5ka3dfx_set_frame_rate(struct v4l2_subdev *sd, fps = fps_table; fps += fps_index; + state->fps = fps_index; err = s5ka3dfx_write_regset_table(sd, fps); out: @@ -944,7 +1026,7 @@ static int s5ka3dfx_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) case V4L2_CID_CAM_PREVIEW_ONOFF: if (state->check_previewdata == 0) - err = 0; + err = s5ka3dfx_set_preview_start(sd); else err = -EIO; break; diff --git a/drivers/media/video/s5ka3dfx.h b/drivers/media/video/s5ka3dfx.h index 22fb6ff..7bf2a8e 100644..100755 --- a/drivers/media/video/s5ka3dfx.h +++ b/drivers/media/video/s5ka3dfx.h @@ -93,9 +93,9 @@ struct s5ka3dfx_reg s5ka3dfx_init_reg[] = { { 0x65, 0x01 }, { 0x66, 0xE7 }, - { 0x6d, 0x55 }, - { 0x6e, 0x90 }, - { 0x6f, 0x90 }, + { 0x6d, 0x56 }, + { 0x6e, 0xC0 }, + { 0x6f, 0xC0 }, { 0x4c, 0x00 }, { 0x4d, 0x9e }, @@ -111,7 +111,7 @@ struct s5ka3dfx_reg s5ka3dfx_init_reg[] = { { 0x33, 0x80 }, { 0x34, 0x79 }, - { 0x36, 0x38 }, + { 0x36, 0x3A }, /*39, 3a, N.L. ST */ { 0x37, 0x38 }, { 0x6a, 0x00 }, @@ -141,9 +141,9 @@ struct s5ka3dfx_reg s5ka3dfx_init_reg[] = { { 0x1d, 0x4f }, { 0x1e, 0x68 }, - { 0x1f, 0x44 }, - { 0x20, 0x75 }, - { 0x21, 0x4d }, + { 0x1f, 0x42 }, /*44, Indoor Rgain Min */ + { 0x20, 0x7A }, /*75 82, 8a, Indoor Bgain Max */ + { 0x21, 0x4D }, /* 4Indoor Bgain Min */ { 0x3a, 0x13 }, { 0x3b, 0x3c }, @@ -406,7 +406,7 @@ struct s5ka3dfx_reg s5ka3dfx_init_reg[] = { { 0x54, 0x83 }, { 0xef, 0x03 }, { 0x6e, 0x40 }, - { 0x6f, 0x6A }, + { 0x6f, 0x50 }, /* dgain for shutter 700lux*/ { 0xef, 0x00 }, { 0x48, 0x00 }, @@ -580,6 +580,8 @@ struct s5ka3dfx_reg s5ka3dfx_init_reg[] = { { 0x48, 0x52 }, { 0x49, 0x03 }, { 0x4A, 0xFF }, + { 0xEF, 0x03 }, + { 0x00, 0x03 }, }; /* @@ -904,7 +906,7 @@ struct s5ka3dfx_reg s5ka3dfx_init_vt_reg[] = { { 0x53, 0xbb }, { 0x54, 0x8a }, { 0xef, 0x03 }, - { 0x70, 0x01 }, + { 0x70, 0x00 }, { 0xef, 0x00 }, { 0x48, 0x00 }, { 0x49, 0x00 }, @@ -1083,19 +1085,19 @@ struct s5ka3dfx_reg s5ka3dfx_init_vt_reg[] = { /* EV bias */ struct s5ka3dfx_reg s5ka3dfx_ev_m5[] = { { 0xef, 0x03 }, - { 0x31, 0xb0 }, + { 0x31, 0xc0 }, { 0x32, 0x98 }, }; struct s5ka3dfx_reg s5ka3dfx_ev_m4[] = { { 0xef, 0x03 }, - { 0x31, 0xa0 }, + { 0x31, 0xA5 }, { 0x32, 0x90 }, }; struct s5ka3dfx_reg s5ka3dfx_ev_m3[] = { { 0xef, 0x03 }, - { 0x31, 0x98 }, + { 0x31, 0x9E }, { 0x32, 0x88 }, }; @@ -1107,31 +1109,31 @@ struct s5ka3dfx_reg s5ka3dfx_ev_m2[] = { struct s5ka3dfx_reg s5ka3dfx_ev_m1[] = { { 0xef, 0x03 }, - { 0x31, 0x88 }, + { 0x31, 0x8A }, { 0x32, 0x08 }, }; struct s5ka3dfx_reg s5ka3dfx_ev_default[] = { { 0xef, 0x03 }, { 0x31, 0x00 }, - { 0x32, 0x10 }, + { 0x32, 0x09 }, }; struct s5ka3dfx_reg s5ka3dfx_ev_p1[] = { { 0xef, 0x03 }, - { 0x31, 0x08 }, + { 0x31, 0x0A }, { 0x32, 0x20 }, }; struct s5ka3dfx_reg s5ka3dfx_ev_p2[] = { { 0xef, 0x03 }, - { 0x31, 0x10 }, + { 0x31, 0x14 }, { 0x32, 0x30 }, }; struct s5ka3dfx_reg s5ka3dfx_ev_p3[] = { { 0xef, 0x03 }, - { 0x31, 0x20 }, + { 0x31, 0x1E }, { 0x32, 0x38 }, }; @@ -1255,9 +1257,9 @@ struct s5ka3dfx_reg s5ka3dfx_wb_cloudy[] = { { 0xef, 0x03 }, { 0x00, 0x85 }, { 0xef, 0x00 }, - { 0x42, 0x6f }, + { 0x42, 0x75 }, { 0x43, 0x3d }, - { 0x44, 0x47 }, + { 0x44, 0x42 }, }; /* Effect Setting */ @@ -1449,6 +1451,30 @@ struct s5ka3dfx_reg s5ka3dfx_fps_15[] = { { 0x67, 0xCF }, }; +struct s5ka3dfx_reg s5ka3dfx_fps_auto[] = { + { 0xEF, 0x03 }, + { 0x5F, 0x03 }, + { 0x60, 0x02 }, + { 0x61, 0x0F }, + { 0x62, 0x0C }, + { 0x63, 0x01 }, + { 0x64, 0xE7 }, + { 0x65, 0x01 }, + { 0x66, 0xE7 }, + { 0x48, 0x00 }, + { 0x49, 0x9E }, + { 0x4C, 0x00 }, + { 0x4D, 0x9E }, + { 0xEF, 0x03 }, + { 0x51, 0x10 }, + { 0x52, 0x00 }, + { 0x53, 0x00 }, + { 0x54, 0x00 }, + { 0x56, 0x01 }, + { 0x57, 0x61 }, + { 0x58, 0x25 }, + { 0x67, 0xCF }, +}; struct s5ka3dfx_reg s5ka3dfx_vt_fps_7[] = { { 0xef, 0x03 }, { 0x50, 0xd2 }, @@ -1536,4 +1562,130 @@ struct s5ka3dfx_reg s5ka3dfx_vt_fps_15[] = { { 0x67, 0xcf }, }; +struct s5ka3dfx_reg s5ka3dfx_vt_fps_auto[] = { + { 0xef, 0x03 }, + { 0x50, 0xd2 }, + { 0x0f, 0x31 }, + { 0xef, 0x03 }, + { 0x5f, 0x03 }, + { 0x60, 0x02 }, + { 0x61, 0x0f }, + { 0x62, 0x0c }, + { 0x63, 0x05 }, + { 0x64, 0x43 }, + { 0x65, 0x05 }, + { 0x66, 0x43 }, + { 0x6d, 0x5a }, + { 0x6E, 0x40 }, + { 0x6f, 0x70 }, + { 0x4c, 0x00 }, + { 0x4d, 0x9E }, + { 0x51, 0x10 }, + { 0x52, 0x00 }, + { 0x53, 0x00 }, + { 0x54, 0x00 }, + { 0x55, 0x22 }, + { 0x56, 0x01 }, + { 0x57, 0x61 }, + { 0x58, 0x25 }, + { 0x67, 0xcf }, + +}; + +struct s5ka3dfx_reg s5ka3dfx_Return_VGA[] = { + { 0xef, 0x00 }, + { 0x7a, 0x00 }, + { 0x11, 0x00 }, + { 0x12, 0x00 }, + { 0x15, 0x02 }, + { 0x16, 0x90 }, + { 0x13, 0x01 }, + { 0x14, 0xF0 }, + { 0x31, 0x04 }, + { 0x30, 0x06 }, + { 0x34, 0x02 }, + { 0x35, 0x88 }, + { 0x32, 0x01 }, + { 0x33, 0xE8 }, + { 0x7d, 0x02 }, + { 0x7e, 0x88 }, + { 0x7b, 0x01 }, + { 0x7C, 0xe8 }, + { 0x81, 0x02 }, + { 0x82, 0x01 }, + { 0x7f, 0x01 }, + { 0x80, 0xe8 }, + { 0xc3, 0x04 }, + { 0xc2, 0x04 }, + { 0xc6, 0x02 }, + { 0xc7, 0x80 }, + { 0xc4, 0x01 }, + { 0xc5, 0xe0 }, + { 0x7a, 0x01 }, +}; + +struct s5ka3dfx_reg s5ka3dfx_QVGA[] = { /* 320 x 240 */ + { 0xef, 0x00 }, + { 0x7a, 0x00 }, + { 0x11, 0x00 }, + { 0x12, 0x00 }, + { 0x15, 0x02 }, + { 0x16, 0x90 }, + { 0x13, 0x01 }, + { 0x14, 0xF0 }, + { 0x31, 0x04 }, + { 0x30, 0x06 }, + { 0x34, 0x02 }, + { 0x35, 0x88 }, + { 0x32, 0x01 }, + { 0x33, 0xE8 }, + { 0x7d, 0x02 }, + { 0x7e, 0x88 }, + { 0x7b, 0x01 }, + { 0x7c, 0xe8 }, + { 0x81, 0x01 }, + { 0x82, 0x48 }, + { 0x7f, 0x00 }, + { 0x80, 0xf8 }, + { 0xc3, 0x04 }, + { 0xc2, 0x04 }, + { 0xc6, 0x01 }, + { 0xc7, 0x40 }, + { 0xc4, 0x00 }, + { 0xc5, 0xf0 }, + { 0x7a, 0x03 }, +}; + + +struct s5ka3dfx_reg s5ka3dfx_QCIF[] = { /* 176 x 144 */ + { 0xef, 0x00 }, + { 0x7a, 0x00 }, + { 0x11, 0x00 }, + { 0x12, 0x00 }, + { 0x15, 0x02 }, + { 0x16, 0x90 }, + { 0x13, 0x01 }, + { 0x14, 0xF0 }, + { 0x31, 0x04 }, + { 0x30, 0x06 }, + { 0x34, 0x02 }, + { 0x35, 0x88 }, + { 0x32, 0x01 }, + { 0x33, 0xE8 }, + { 0x7d, 0x02 }, + { 0x7e, 0x88 }, + { 0x7b, 0x01 }, + { 0x7c, 0xe8 }, + { 0x81, 0x00 }, + { 0x82, 0xc0 }, + { 0x7f, 0x00 }, + { 0x80, 0x98 }, + { 0xc3, 0x08 }, + { 0xc2, 0x04 }, + { 0xc6, 0x00 }, + { 0xc7, 0xb0 }, + { 0xc4, 0x00 }, + { 0xc5, 0x90 }, + { 0x7a, 0x03 }, +}; #endif |