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| author | David S. Miller <davem@davemloft.net> | 2009-02-28 22:32:16 -0800 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2009-02-28 22:32:16 -0800 |
| commit | 8010dc306ba39a8cdb3993d1e809fcb7dfdf089a (patch) | |
| tree | d1fa3fe2e1501a6780fc007f2f57b1fe0995e18e /drivers/net/wireless/ath9k/mac.c | |
| parent | 5d242f1cee2c85721bbe9d8205e98c1c01f5d805 (diff) | |
| parent | 2a07954b83a3d4dc93031d3ce030fb9380a8e15a (diff) | |
| download | kernel_samsung_crespo-8010dc306ba39a8cdb3993d1e809fcb7dfdf089a.zip kernel_samsung_crespo-8010dc306ba39a8cdb3993d1e809fcb7dfdf089a.tar.gz kernel_samsung_crespo-8010dc306ba39a8cdb3993d1e809fcb7dfdf089a.tar.bz2 | |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next-2.6
Diffstat (limited to 'drivers/net/wireless/ath9k/mac.c')
| -rw-r--r-- | drivers/net/wireless/ath9k/mac.c | 30 |
1 files changed, 24 insertions, 6 deletions
diff --git a/drivers/net/wireless/ath9k/mac.c b/drivers/net/wireless/ath9k/mac.c index f32c622..f757bc7 100644 --- a/drivers/net/wireless/ath9k/mac.c +++ b/drivers/net/wireless/ath9k/mac.c @@ -285,7 +285,7 @@ int ath9k_hw_txprocdesc(struct ath_hw *ah, struct ath_desc *ds) ds->ds_txstat.ts_shortretry = MS(ads->ds_txstatus1, AR_RTSFailCnt); ds->ds_txstat.ts_longretry = MS(ads->ds_txstatus1, AR_DataFailCnt); ds->ds_txstat.ts_virtcol = MS(ads->ds_txstatus1, AR_VirtRetryCnt); - ds->ds_txstat.ts_antenna = 1; + ds->ds_txstat.ts_antenna = 0; return 0; } @@ -886,7 +886,8 @@ bool ath9k_hw_setrxabort(struct ath_hw *ah, bool set) REG_SET_BIT(ah, AR_DIAG_SW, (AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT)); - if (!ath9k_hw_wait(ah, AR_OBS_BUS_1, AR_OBS_BUS_1_RX_STATE, 0)) { + if (!ath9k_hw_wait(ah, AR_OBS_BUS_1, AR_OBS_BUS_1_RX_STATE, + 0, AH_WAIT_TIMEOUT)) { REG_CLR_BIT(ah, AR_DIAG_SW, (AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT)); @@ -933,15 +934,32 @@ void ath9k_hw_stoppcurecv(struct ath_hw *ah) bool ath9k_hw_stopdmarecv(struct ath_hw *ah) { +#define AH_RX_STOP_DMA_TIMEOUT 10000 /* usec */ +#define AH_RX_TIME_QUANTUM 100 /* usec */ + + int i; + REG_WRITE(ah, AR_CR, AR_CR_RXD); - if (!ath9k_hw_wait(ah, AR_CR, AR_CR_RXE, 0)) { + /* Wait for rx enable bit to go low */ + for (i = AH_RX_STOP_DMA_TIMEOUT / AH_TIME_QUANTUM; i != 0; i--) { + if ((REG_READ(ah, AR_CR) & AR_CR_RXE) == 0) + break; + udelay(AH_TIME_QUANTUM); + } + + if (i == 0) { DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, - "dma failed to stop in 10ms\n" - "AR_CR=0x%08x\nAR_DIAG_SW=0x%08x\n", - REG_READ(ah, AR_CR), REG_READ(ah, AR_DIAG_SW)); + "dma failed to stop in %d ms " + "AR_CR=0x%08x AR_DIAG_SW=0x%08x\n", + AH_RX_STOP_DMA_TIMEOUT / 1000, + REG_READ(ah, AR_CR), + REG_READ(ah, AR_DIAG_SW)); return false; } else { return true; } + +#undef AH_RX_TIME_QUANTUM +#undef AH_RX_STOP_DMA_TIMEOUT } |