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| author | Florian Fainelli <florian@openwrt.org> | 2010-01-27 09:10:06 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2010-02-27 12:53:16 +0100 |
| commit | 780019ddf02f214ad61e641b57b8ac30c837e2a7 (patch) | |
| tree | 2d0a01efc4d508057bcfaa7b3df5b3e490c249ed /drivers/watchdog | |
| parent | 5f3c909881d5deebb9a3ddc836a15937e76daefc (diff) | |
| download | kernel_samsung_crespo-780019ddf02f214ad61e641b57b8ac30c837e2a7.zip kernel_samsung_crespo-780019ddf02f214ad61e641b57b8ac30c837e2a7.tar.gz kernel_samsung_crespo-780019ddf02f214ad61e641b57b8ac30c837e2a7.tar.bz2 | |
MIPS: AR7: Implement clock API
This patch makes the ar7 clock code implement the Linux clk API. Drivers
using the various clocks available in the SoC are updated accordingly.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
To: linux-mips@linux-mips.org
Cc: Wim Van Sebroeck <wim@iguana.be>
Cc: netdev@vger.kernel.org
Cc: David Miller <davem@davemloft.net>
Patchwork: http://patchwork.linux-mips.org/patch/881/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'drivers/watchdog')
| -rw-r--r-- | drivers/watchdog/ar7_wdt.c | 18 |
1 files changed, 15 insertions, 3 deletions
diff --git a/drivers/watchdog/ar7_wdt.c b/drivers/watchdog/ar7_wdt.c index 2e94b71..2bb95cd 100644 --- a/drivers/watchdog/ar7_wdt.c +++ b/drivers/watchdog/ar7_wdt.c @@ -34,6 +34,7 @@ #include <linux/ioport.h> #include <linux/io.h> #include <linux/uaccess.h> +#include <linux/clk.h> #include <asm/addrspace.h> #include <asm/mach-ar7/ar7.h> @@ -80,6 +81,8 @@ static struct resource *ar7_regs_wdt; /* Pointer to the remapped WDT IO space */ static struct ar7_wdt *ar7_wdt; +static struct clk *vbus_clk; + static void ar7_wdt_kick(u32 value) { WRITE_REG(ar7_wdt->kick_lock, 0x5555); @@ -138,17 +141,19 @@ static void ar7_wdt_disable(u32 value) static void ar7_wdt_update_margin(int new_margin) { u32 change; + u32 vbus_rate; - change = new_margin * (ar7_vbus_freq() / prescale_value); + vbus_rate = clk_get_rate(vbus_clk); + change = new_margin * (vbus_rate / prescale_value); if (change < 1) change = 1; if (change > 0xffff) change = 0xffff; ar7_wdt_change(change); - margin = change * prescale_value / ar7_vbus_freq(); + margin = change * prescale_value / vbus_rate; printk(KERN_INFO DRVNAME ": timer margin %d seconds (prescale %d, change %d, freq %d)\n", - margin, prescale_value, change, ar7_vbus_freq()); + margin, prescale_value, change, vbus_rate); } static void ar7_wdt_enable_wdt(void) @@ -298,6 +303,13 @@ static int __devinit ar7_wdt_probe(struct platform_device *pdev) goto out_mem_region; } + vbus_clk = clk_get(NULL, "vbus"); + if (IS_ERR(vbus_clk)) { + printk(KERN_ERR DRVNAME ": could not get vbus clock\n"); + rc = PTR_ERR(vbus_clk); + goto out_mem_region; + } + ar7_wdt_disable_wdt(); ar7_wdt_prescale(prescale_value); ar7_wdt_update_margin(margin); |