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| author | Andi Kleen <ak@suse.de> | 2006-04-07 19:49:45 +0200 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-04-09 11:53:51 -0700 |
| commit | 95d769aaf47abfc77b600631403ff5af6c990cff (patch) | |
| tree | 738fff854613a086e7c1ad04074fa596b8554760 /include/asm-i386 | |
| parent | d1530d82e02fd96d4634a6d6f6538c8b778c43af (diff) | |
| download | kernel_samsung_crespo-95d769aaf47abfc77b600631403ff5af6c990cff.zip kernel_samsung_crespo-95d769aaf47abfc77b600631403ff5af6c990cff.tar.gz kernel_samsung_crespo-95d769aaf47abfc77b600631403ff5af6c990cff.tar.bz2 | |
[PATCH] i386: Consolidate modern APIC handling
AMD systems have a modern APIC that supports 8 bit IDs, but
don't have a XAPIC version number. Add a new "modern_apic"
subfunction that handles this correctly and use it (nearly)
everywhere where XAPIC is tested for.
I removed one wart: the code specified that external APICs
would use an 8bit APIC ID. But I checked a real 82093 data sheet
and it says clearly that they only use 4bit. So I removed
this special case since it would a bit awkward to implement now.
I removed the valid APIC tests in mptable parsing completely. On any modern
system they only check against the full field width (8bit) anyways
and are no-ops. This also fixes them doing the wrong thing
on >8 core Opterons.
This makes i386 boot again on 16 core Opterons.
Cc: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-i386')
| -rw-r--r-- | include/asm-i386/apic.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/asm-i386/apic.h b/include/asm-i386/apic.h index ff9ac8d..288233f 100644 --- a/include/asm-i386/apic.h +++ b/include/asm-i386/apic.h @@ -139,6 +139,8 @@ void switch_ipi_to_APIC_timer(void *cpumask); extern int timer_over_8254; +extern int modern_apic(void); + #else /* !CONFIG_X86_LOCAL_APIC */ static inline void lapic_shutdown(void) { } |