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| author | David Gibson <david@gibson.dropbear.id.au> | 2005-07-27 11:44:19 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-07-27 16:25:58 -0700 |
| commit | 533f08172e21521a74e15cdef8a13c929596d506 (patch) | |
| tree | 60f2117ffb85f61fcdc0e17d864d0114096a4192 /include/asm-ppc64/iSeries/IoHriMainStore.h | |
| parent | 6fdfb382813d66757aef4d83e369f8153a40b371 (diff) | |
| download | kernel_samsung_crespo-533f08172e21521a74e15cdef8a13c929596d506.zip kernel_samsung_crespo-533f08172e21521a74e15cdef8a13c929596d506.tar.gz kernel_samsung_crespo-533f08172e21521a74e15cdef8a13c929596d506.tar.bz2 | |
[PATCH] ppc64: dynamically allocate segment tables
PPC64 machines before Power4 need a segment table page allocated for each
CPU. Currently these are allocated statically in a big array in head.S for
all CPUs. The segment tables need to be in the first segment (so
do_stab_bolted doesn't take a recursive fault on the stab itself), but
other than that there are no constraints which require the stabs for the
secondary CPUs to be statically allocated.
This patch allocates segment tables dynamically during boot, using
lmb_alloc() to ensure they are within the first 256M segment. This reduces
the kernel image size by 192k...
Tested on RS64 iSeries, POWER3 pSeries, and POWER5.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-ppc64/iSeries/IoHriMainStore.h')
0 files changed, 0 insertions, 0 deletions