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| author | Stefan Roese <sr@denx.de> | 2007-11-20 21:19:16 +1100 |
|---|---|---|
| committer | Josh Boyer <jwboyer@linux.vnet.ibm.com> | 2007-12-23 13:31:16 -0600 |
| commit | f4151b9ba87901eb3a7bc49f418cc352d4e1927e (patch) | |
| tree | 7481891935cea47d7794e583a6fdfe530575c17d /include/asm-ppc | |
| parent | 4922566f0394ac41c72fb960f22b4f84333026bc (diff) | |
| download | kernel_samsung_crespo-f4151b9ba87901eb3a7bc49f418cc352d4e1927e.zip kernel_samsung_crespo-f4151b9ba87901eb3a7bc49f418cc352d4e1927e.tar.gz kernel_samsung_crespo-f4151b9ba87901eb3a7bc49f418cc352d4e1927e.tar.bz2 | |
[POWERPC] 4xx: Fix TLB 0 problem with CONFIG_SERIAL_TEXT_DEBUG
Right now TLB entry 0 ist used as UART0 mapping for the early debug
output (via CONFIG_SERIAL_TEXT_DEBUG). This causes problems when many
TLB's get used upon Linux bootup (e.g. while PCIe scanning behind
bridges and/or switches on 440SPe platforms). This will overwrite the
TLB 0 entry and further debug output's may crash/hang the system.
This patch moves the early debug UART0 TLB entry from 0 to 62 as done
in arch/powerpc. This way it is in the "pinned" area and will not get
overwritten. Also the arch/ppc/mm/44x_mmu.c code is now synced with the
newer code from arch/powerpc.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Diffstat (limited to 'include/asm-ppc')
| -rw-r--r-- | include/asm-ppc/mmu.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/include/asm-ppc/mmu.h b/include/asm-ppc/mmu.h index 14584e5..d46b57b 100644 --- a/include/asm-ppc/mmu.h +++ b/include/asm-ppc/mmu.h @@ -383,6 +383,12 @@ typedef struct _P601_BAT { #define BOOKE_PAGESZ_256GB 14 #define BOOKE_PAGESZ_1TB 15 +#ifndef CONFIG_SERIAL_TEXT_DEBUG +#define PPC44x_EARLY_TLBS 1 +#else +#define PPC44x_EARLY_TLBS 2 +#endif + /* * Freescale Book-E MMU support */ |