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authorRajashekhara, Sudhakar <sudhakar.raj@ti.com>2011-07-20 17:36:04 +0530
committerGreg Kroah-Hartman <gregkh@suse.de>2011-08-04 21:58:33 -0700
commitcad9b0afb809af7e7710dd8d3cf48e79eab5e276 (patch)
tree194a1f2c8b17c110f777d585b704c1631bfadcfe /sound/soc
parent6d1c18d3afe7b182f09402d41f82206544d9c3ff (diff)
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ASoC: davinci: fix codec start and stop functions
commit 3012f43eaf7592d8121426918e43e3b5db013aff upstream. According to DM365 voice codec data sheet at [1], before starting recording or playback, ADC/DAC modules should follow a reset and enable cycle. Writing a 1 to the ADC/DAC bit in the register resets the module and clearing the bit to 0 will enable the module. But the driver seems to be doing the reverse of it. [1] http://focus.ti.com/lit/ug/sprufi9b/sprufi9b.pdf Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com> Acked-by: Liam Girdwood <lrg@ti.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'sound/soc')
-rw-r--r--sound/soc/davinci/davinci-vcif.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/sound/soc/davinci/davinci-vcif.c b/sound/soc/davinci/davinci-vcif.c
index bfe4ec8..1f11525 100644
--- a/sound/soc/davinci/davinci-vcif.c
+++ b/sound/soc/davinci/davinci-vcif.c
@@ -62,9 +62,9 @@ static void davinci_vcif_start(struct snd_pcm_substream *substream)
w = readl(davinci_vc->base + DAVINCI_VC_CTRL);
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
- MOD_REG_BIT(w, DAVINCI_VC_CTRL_RSTDAC, 1);
+ MOD_REG_BIT(w, DAVINCI_VC_CTRL_RSTDAC, 0);
else
- MOD_REG_BIT(w, DAVINCI_VC_CTRL_RSTADC, 1);
+ MOD_REG_BIT(w, DAVINCI_VC_CTRL_RSTADC, 0);
writel(w, davinci_vc->base + DAVINCI_VC_CTRL);
}
@@ -80,9 +80,9 @@ static void davinci_vcif_stop(struct snd_pcm_substream *substream)
/* Reset transmitter/receiver and sample rate/frame sync generators */
w = readl(davinci_vc->base + DAVINCI_VC_CTRL);
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
- MOD_REG_BIT(w, DAVINCI_VC_CTRL_RSTDAC, 0);
+ MOD_REG_BIT(w, DAVINCI_VC_CTRL_RSTDAC, 1);
else
- MOD_REG_BIT(w, DAVINCI_VC_CTRL_RSTADC, 0);
+ MOD_REG_BIT(w, DAVINCI_VC_CTRL_RSTADC, 1);
writel(w, davinci_vc->base + DAVINCI_VC_CTRL);
}