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-rw-r--r--arch/mips/powertv/Makefile7
-rw-r--r--arch/mips/powertv/Platform7
-rw-r--r--arch/mips/powertv/asic/Makefile6
-rw-r--r--arch/mips/powertv/asic/asic-calliope.c2
-rw-r--r--arch/mips/powertv/asic/asic-cronus.c4
-rw-r--r--arch/mips/powertv/asic/asic-gaia.c96
-rw-r--r--arch/mips/powertv/asic/asic-zeus.c2
-rw-r--r--arch/mips/powertv/asic/asic_devices.c276
-rw-r--r--arch/mips/powertv/asic/prealloc-gaia.c589
-rw-r--r--arch/mips/powertv/init.c4
-rw-r--r--arch/mips/powertv/ioremap.c136
-rw-r--r--arch/mips/powertv/memory.c341
-rw-r--r--arch/mips/powertv/powertv-usb.c403
-rw-r--r--arch/mips/powertv/powertv_setup.c6
14 files changed, 1538 insertions, 341 deletions
diff --git a/arch/mips/powertv/Makefile b/arch/mips/powertv/Makefile
index 0a0d73c..baf6e90 100644
--- a/arch/mips/powertv/Makefile
+++ b/arch/mips/powertv/Makefile
@@ -23,6 +23,9 @@
# under Linux.
#
-obj-y += init.o memory.o reset.o time.o powertv_setup.o asic/ pci/
+obj-y += init.o ioremap.o memory.o powertv_setup.o reset.o time.o \
+ asic/ pci/
-EXTRA_CFLAGS += -Wall -Werror
+obj-$(CONFIG_USB) += powertv-usb.o
+
+EXTRA_CFLAGS += -Wall
diff --git a/arch/mips/powertv/Platform b/arch/mips/powertv/Platform
new file mode 100644
index 0000000..4eb5af1
--- /dev/null
+++ b/arch/mips/powertv/Platform
@@ -0,0 +1,7 @@
+#
+# Cisco PowerTV Platform
+#
+platform-$(CONFIG_POWERTV) += powertv/
+cflags-$(CONFIG_POWERTV) += \
+ -I$(srctree)/arch/mips/include/asm/mach-powertv
+load-$(CONFIG_POWERTV) += 0xffffffff90800000
diff --git a/arch/mips/powertv/asic/Makefile b/arch/mips/powertv/asic/Makefile
index bebfdcf..f0e95dc 100644
--- a/arch/mips/powertv/asic/Makefile
+++ b/arch/mips/powertv/asic/Makefile
@@ -16,8 +16,8 @@
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
#
-obj-y += asic-calliope.o asic-cronus.o asic-zeus.o asic_devices.o asic_int.o \
- irq_asic.o prealloc-calliope.o prealloc-cronus.o \
- prealloc-cronuslite.o prealloc-zeus.o
+obj-y += asic-calliope.o asic-cronus.o asic-gaia.o asic-zeus.o \
+ asic_devices.o asic_int.o irq_asic.o prealloc-calliope.o \
+ prealloc-cronus.o prealloc-cronuslite.o prealloc-gaia.o prealloc-zeus.o
EXTRA_CFLAGS += -Wall -Werror
diff --git a/arch/mips/powertv/asic/asic-calliope.c b/arch/mips/powertv/asic/asic-calliope.c
index 1ae6623..0a170e0 100644
--- a/arch/mips/powertv/asic/asic-calliope.c
+++ b/arch/mips/powertv/asic/asic-calliope.c
@@ -77,7 +77,7 @@ const struct register_map calliope_register_map __initdata = {
.int_docsis_en = {.phys = CALLIOPE_ADDR(0xA028F4)},
.mips_pll_setup = {.phys = CALLIOPE_ADDR(0x980000)},
- .usb_fs = {.phys = CALLIOPE_ADDR(0x980030)},
+ .fs432x4b4_usb_ctl = {.phys = CALLIOPE_ADDR(0x980030)},
.test_bus = {.phys = CALLIOPE_ADDR(0x9800CC)},
.crt_spare = {.phys = CALLIOPE_ADDR(0x9800d4)},
.usb2_ohci_int_mask = {.phys = CALLIOPE_ADDR(0x9A000c)},
diff --git a/arch/mips/powertv/asic/asic-cronus.c b/arch/mips/powertv/asic/asic-cronus.c
index 5bb64bf..bbc0c12 100644
--- a/arch/mips/powertv/asic/asic-cronus.c
+++ b/arch/mips/powertv/asic/asic-cronus.c
@@ -77,13 +77,13 @@ const struct register_map cronus_register_map __initdata = {
.int_docsis_en = {.phys = CRONUS_ADDR(0x2A28F4)},
.mips_pll_setup = {.phys = CRONUS_ADDR(0x1C0000)},
- .usb_fs = {.phys = CRONUS_ADDR(0x1C0018)},
+ .fs432x4b4_usb_ctl = {.phys = CRONUS_ADDR(0x1C0028)},
.test_bus = {.phys = CRONUS_ADDR(0x1C00CC)},
.crt_spare = {.phys = CRONUS_ADDR(0x1c00d4)},
.usb2_ohci_int_mask = {.phys = CRONUS_ADDR(0x20000C)},
.usb2_strap = {.phys = CRONUS_ADDR(0x200014)},
.ehci_hcapbase = {.phys = CRONUS_ADDR(0x21FE00)},
- .ohci_hc_revision = {.phys = CRONUS_ADDR(0x1E0000)},
+ .ohci_hc_revision = {.phys = CRONUS_ADDR(0x21fc00)},
.bcm1_bs_lmi_steer = {.phys = CRONUS_ADDR(0x2E0008)},
.usb2_control = {.phys = CRONUS_ADDR(0x2E004C)},
.usb2_stbus_obc = {.phys = CRONUS_ADDR(0x21FF00)},
diff --git a/arch/mips/powertv/asic/asic-gaia.c b/arch/mips/powertv/asic/asic-gaia.c
new file mode 100644
index 0000000..91dda68
--- /dev/null
+++ b/arch/mips/powertv/asic/asic-gaia.c
@@ -0,0 +1,96 @@
+/*
+ * Locations of devices in the Gaia ASIC
+ *
+ * Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ *
+ * Author: David VomLehn
+ */
+
+#include <linux/init.h>
+#include <asm/mach-powertv/asic.h>
+
+const struct register_map gaia_register_map __initdata = {
+ .eic_slow0_strt_add = {.phys = GAIA_IO_BASE + 0x000000},
+ .eic_cfg_bits = {.phys = GAIA_IO_BASE + 0x000038},
+ .eic_ready_status = {.phys = GAIA_IO_BASE + 0x00004C},
+
+ .chipver3 = {.phys = GAIA_IO_BASE + 0x2A0800},
+ .chipver2 = {.phys = GAIA_IO_BASE + 0x2A0804},
+ .chipver1 = {.phys = GAIA_IO_BASE + 0x2A0808},
+ .chipver0 = {.phys = GAIA_IO_BASE + 0x2A080C},
+
+ /* The registers of IRBlaster */
+ .uart1_intstat = {.phys = GAIA_IO_BASE + 0x2A1800},
+ .uart1_inten = {.phys = GAIA_IO_BASE + 0x2A1804},
+ .uart1_config1 = {.phys = GAIA_IO_BASE + 0x2A1808},
+ .uart1_config2 = {.phys = GAIA_IO_BASE + 0x2A180C},
+ .uart1_divisorhi = {.phys = GAIA_IO_BASE + 0x2A1810},
+ .uart1_divisorlo = {.phys = GAIA_IO_BASE + 0x2A1814},
+ .uart1_data = {.phys = GAIA_IO_BASE + 0x2A1818},
+ .uart1_status = {.phys = GAIA_IO_BASE + 0x2A181C},
+
+ .int_stat_3 = {.phys = GAIA_IO_BASE + 0x2A2800},
+ .int_stat_2 = {.phys = GAIA_IO_BASE + 0x2A2804},
+ .int_stat_1 = {.phys = GAIA_IO_BASE + 0x2A2808},
+ .int_stat_0 = {.phys = GAIA_IO_BASE + 0x2A280C},
+ .int_config = {.phys = GAIA_IO_BASE + 0x2A2810},
+ .int_int_scan = {.phys = GAIA_IO_BASE + 0x2A2818},
+ .ien_int_3 = {.phys = GAIA_IO_BASE + 0x2A2830},
+ .ien_int_2 = {.phys = GAIA_IO_BASE + 0x2A2834},
+ .ien_int_1 = {.phys = GAIA_IO_BASE + 0x2A2838},
+ .ien_int_0 = {.phys = GAIA_IO_BASE + 0x2A283C},
+ .int_level_3_3 = {.phys = GAIA_IO_BASE + 0x2A2880},
+ .int_level_3_2 = {.phys = GAIA_IO_BASE + 0x2A2884},
+ .int_level_3_1 = {.phys = GAIA_IO_BASE + 0x2A2888},
+ .int_level_3_0 = {.phys = GAIA_IO_BASE + 0x2A288C},
+ .int_level_2_3 = {.phys = GAIA_IO_BASE + 0x2A2890},
+ .int_level_2_2 = {.phys = GAIA_IO_BASE + 0x2A2894},
+ .int_level_2_1 = {.phys = GAIA_IO_BASE + 0x2A2898},
+ .int_level_2_0 = {.phys = GAIA_IO_BASE + 0x2A289C},
+ .int_level_1_3 = {.phys = GAIA_IO_BASE + 0x2A28A0},
+ .int_level_1_2 = {.phys = GAIA_IO_BASE + 0x2A28A4},
+ .int_level_1_1 = {.phys = GAIA_IO_BASE + 0x2A28A8},
+ .int_level_1_0 = {.phys = GAIA_IO_BASE + 0x2A28AC},
+ .int_level_0_3 = {.phys = GAIA_IO_BASE + 0x2A28B0},
+ .int_level_0_2 = {.phys = GAIA_IO_BASE + 0x2A28B4},
+ .int_level_0_1 = {.phys = GAIA_IO_BASE + 0x2A28B8},
+ .int_level_0_0 = {.phys = GAIA_IO_BASE + 0x2A28BC},
+ .int_docsis_en = {.phys = GAIA_IO_BASE + 0x2A28F4},
+
+ .mips_pll_setup = {.phys = GAIA_IO_BASE + 0x1C0000},
+ .fs432x4b4_usb_ctl = {.phys = GAIA_IO_BASE + 0x1C0024},
+ .test_bus = {.phys = GAIA_IO_BASE + 0x1C00CC},
+ .crt_spare = {.phys = GAIA_IO_BASE + 0x1c0108},
+ .usb2_ohci_int_mask = {.phys = GAIA_IO_BASE + 0x20000C},
+ .usb2_strap = {.phys = GAIA_IO_BASE + 0x200014},
+ .ehci_hcapbase = {.phys = GAIA_IO_BASE + 0x21FE00},
+ .ohci_hc_revision = {.phys = GAIA_IO_BASE + 0x21fc00},
+ .bcm1_bs_lmi_steer = {.phys = GAIA_IO_BASE + 0x2E0004},
+ .usb2_control = {.phys = GAIA_IO_BASE + 0x2E004C},
+ .usb2_stbus_obc = {.phys = GAIA_IO_BASE + 0x21FF00},
+ .usb2_stbus_mess_size = {.phys = GAIA_IO_BASE + 0x21FF04},
+ .usb2_stbus_chunk_size = {.phys = GAIA_IO_BASE + 0x21FF08},
+
+ .pcie_regs = {.phys = GAIA_IO_BASE + 0x220000},
+ .tim_ch = {.phys = GAIA_IO_BASE + 0x2A2C10},
+ .tim_cl = {.phys = GAIA_IO_BASE + 0x2A2C14},
+ .gpio_dout = {.phys = GAIA_IO_BASE + 0x2A2C20},
+ .gpio_din = {.phys = GAIA_IO_BASE + 0x2A2C24},
+ .gpio_dir = {.phys = GAIA_IO_BASE + 0x2A2C2C},
+ .watchdog = {.phys = GAIA_IO_BASE + 0x2A2C30},
+ .front_panel = {.phys = GAIA_IO_BASE + 0x2A3800},
+};
diff --git a/arch/mips/powertv/asic/asic-zeus.c b/arch/mips/powertv/asic/asic-zeus.c
index 095cbe10..4a05bb0 100644
--- a/arch/mips/powertv/asic/asic-zeus.c
+++ b/arch/mips/powertv/asic/asic-zeus.c
@@ -77,7 +77,7 @@ const struct register_map zeus_register_map __initdata = {
.int_docsis_en = {.phys = ZEUS_ADDR(0x2828F4)},
.mips_pll_setup = {.phys = ZEUS_ADDR(0x1a0000)},
- .usb_fs = {.phys = ZEUS_ADDR(0x1a0018)},
+ .fs432x4b4_usb_ctl = {.phys = ZEUS_ADDR(0x1a0018)},
.test_bus = {.phys = ZEUS_ADDR(0x1a0238)},
.crt_spare = {.phys = ZEUS_ADDR(0x1a0090)},
.usb2_ohci_int_mask = {.phys = ZEUS_ADDR(0x1e000c)},
diff --git a/arch/mips/powertv/asic/asic_devices.c b/arch/mips/powertv/asic/asic_devices.c
index 9ec523e..e56fa61 100644
--- a/arch/mips/powertv/asic/asic_devices.c
+++ b/arch/mips/powertv/asic/asic_devices.c
@@ -1,7 +1,6 @@
/*
- * ASIC Device List Intialization
*
- * Description: Defines the platform resources for the SA settop.
+ * Description: Defines the platform resources for Gaia-based settops.
*
* Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
*
@@ -19,11 +18,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*
- * Author: Ken Eppinett
- * David Schleef <ds@schleef.org>
- *
- * Description: Defines the platform resources for the SA settop.
- *
* NOTE: The bootloader allocates persistent memory at an address which is
* 16 MiB below the end of the highest address in KSEG0. All fixed
* address memory reservations must avoid this region.
@@ -39,7 +33,6 @@
#include <linux/mm.h>
#include <linux/platform_device.h>
#include <linux/module.h>
-#include <linux/gfp.h>
#include <asm/page.h>
#include <linux/swap.h>
#include <linux/highmem.h>
@@ -74,14 +67,13 @@ unsigned long asic_phy_base;
unsigned long asic_base;
EXPORT_SYMBOL(asic_base); /* Exported for testing */
struct resource *gp_resources;
-static bool usb_configured;
/*
* Don't recommend to use it directly, it is usually used by kernel internally.
* Portable code should be using interfaces such as ioremp, dma_map_single, etc.
*/
-unsigned long phys_to_bus_offset;
-EXPORT_SYMBOL(phys_to_bus_offset);
+unsigned long phys_to_dma_offset;
+EXPORT_SYMBOL(phys_to_dma_offset);
/*
*
@@ -97,101 +89,19 @@ struct resource asic_resource = {
};
/*
- *
- * USB Host Resource Definition
- *
- */
-
-static struct resource ehci_resources[] = {
- {
- .parent = &asic_resource,
- .start = 0,
- .end = 0xff,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = irq_usbehci,
- .end = irq_usbehci,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static u64 ehci_dmamask = DMA_BIT_MASK(32);
-
-static struct platform_device ehci_device = {
- .name = "powertv-ehci",
- .id = 0,
- .num_resources = 2,
- .resource = ehci_resources,
- .dev = {
- .dma_mask = &ehci_dmamask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
-};
-
-static struct resource ohci_resources[] = {
- {
- .parent = &asic_resource,
- .start = 0,
- .end = 0xff,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = irq_usbohci,
- .end = irq_usbohci,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static u64 ohci_dmamask = DMA_BIT_MASK(32);
-
-static struct platform_device ohci_device = {
- .name = "powertv-ohci",
- .id = 0,
- .num_resources = 2,
- .resource = ohci_resources,
- .dev = {
- .dma_mask = &ohci_dmamask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
-};
-
-static struct platform_device *platform_devices[] = {
- &ehci_device,
- &ohci_device,
-};
-
-/*
- *
- * Platform Configuration and Device Initialization
- *
- */
-static void __init fs_update(int pe, int md, int sdiv, int disable_div_by_3)
-{
- int en_prg, byp, pwr, nsb, val;
- int sout;
-
- sout = 1;
- en_prg = 1;
- byp = 0;
- nsb = 1;
- pwr = 1;
-
- val = ((sdiv << 29) | (md << 24) | (pe<<8) | (sout<<3) | (byp<<2) |
- (nsb<<1) | (disable_div_by_3<<5));
-
- asic_write(val, usb_fs);
- asic_write(val | (en_prg<<4), usb_fs);
- asic_write(val | (en_prg<<4) | pwr, usb_fs);
-}
-
-/*
* Allow override of bootloader-specified model
+ * Returns zero on success, a negative errno value on failure. This parameter
+ * allows overriding of the bootloader-specified model.
*/
static char __initdata cmdline[COMMAND_LINE_SIZE];
#define FORCEFAMILY_PARAM "forcefamily"
+/*
+ * check_forcefamily - check for, and parse, forcefamily command line parameter
+ * @forced_family: Pointer to two-character array in which to store the
+ * value of the forcedfamily parameter, if any.
+ */
static __init int check_forcefamily(unsigned char forced_family[2])
{
const char *p;
@@ -231,14 +141,10 @@ static __init int check_forcefamily(unsigned char forced_family[2])
*/
static __init noinline void platform_set_family(void)
{
-#define BOOTLDRFAMILY(byte1, byte0) (((byte1) << 8) | (byte0))
-
unsigned char forced_family[2];
unsigned short bootldr_family;
- check_forcefamily(forced_family);
-
- if (forced_family[0] != '\0' && forced_family[1] != '\0')
+ if (check_forcefamily(forced_family) == 0)
bootldr_family = BOOTLDRFAMILY(forced_family[0],
forced_family[1]);
else {
@@ -289,6 +195,9 @@ static __init noinline void platform_set_family(void)
case BOOTLDRFAMILY('F', '1'):
platform_family = FAMILY_1500VZF;
break;
+ case BOOTLDRFAMILY('8', '7'):
+ platform_family = FAMILY_8700;
+ break;
default:
platform_family = -1;
}
@@ -301,24 +210,9 @@ unsigned int platform_get_family(void)
EXPORT_SYMBOL(platform_get_family);
/*
- * \brief usb_eye_configure() for optimizing the USB eye on Calliope.
- *
- * \param unsigned int value saved to the register.
- *
- * \return none
- *
- */
-static void __init usb_eye_configure(unsigned int value)
-{
- asic_write(asic_read(crt_spare) | value, crt_spare);
-}
-
-/*
* platform_get_asic - determine the ASIC type.
*
- * \param none
- *
- * \return ASIC type; ASIC_UNKNOWN if none
+ * Returns the ASIC type, or ASIC_UNKNOWN if unknown
*
*/
enum asic_type platform_get_asic(void)
@@ -328,93 +222,10 @@ enum asic_type platform_get_asic(void)
EXPORT_SYMBOL(platform_get_asic);
/*
- * platform_configure_usb - usb configuration based on platform type.
- * @bcm1_usb2_ctl: value for the BCM1_USB2_CTL register, which is
- * quirky
- */
-static void __init platform_configure_usb(void)
-{
- u32 bcm1_usb2_ctl;
-
- if (usb_configured)
- return;
-
- switch (asic) {
- case ASIC_ZEUS:
- case ASIC_CRONUS:
- case ASIC_CRONUSLITE:
- fs_update(0x0000, 0x11, 0x02, 0);
- bcm1_usb2_ctl = 0x803;
- break;
-
- case ASIC_CALLIOPE:
- fs_update(0x0000, 0x11, 0x02, 1);
-
- switch (platform_family) {
- case FAMILY_1500VZE:
- break;
-
- case FAMILY_1500VZF:
- usb_eye_configure(0x003c0000);
- break;
-
- default:
- usb_eye_configure(0x00300000);
- break;
- }
-
- bcm1_usb2_ctl = 0x803;
- break;
-
- default:
- pr_err("Unknown ASIC type: %d\n", asic);
- break;
- }
-
- /* turn on USB power */
- asic_write(0, usb2_strap);
- /* Enable all OHCI interrupts */
- asic_write(bcm1_usb2_ctl, usb2_control);
- /* USB2_STBUS_OBC store32/load32 */
- asic_write(3, usb2_stbus_obc);
- /* USB2_STBUS_MESS_SIZE 2 packets */
- asic_write(1, usb2_stbus_mess_size);
- /* USB2_STBUS_CHUNK_SIZE 2 packets */
- asic_write(1, usb2_stbus_chunk_size);
-
- usb_configured = true;
-}
-
-/*
- * Set up the USB EHCI interface
+ * set_register_map - set ASIC register configuration
+ * @phys_base: Physical address of the base of the ASIC registers
+ * @map: Description of key ASIC registers
*/
-void platform_configure_usb_ehci()
-{
- platform_configure_usb();
-}
-
-/*
- * Set up the USB OHCI interface
- */
-void platform_configure_usb_ohci()
-{
- platform_configure_usb();
-}
-
-/*
- * Shut the USB EHCI interface down--currently a NOP
- */
-void platform_unconfigure_usb_ehci()
-{
-}
-
-/*
- * Shut the USB OHCI interface down--currently a NOP
- */
-void platform_unconfigure_usb_ohci()
-{
-}
-
static void __init set_register_map(unsigned long phys_base,
const struct register_map *map)
{
@@ -526,6 +337,15 @@ void __init configure_platform(void)
"DVR_CAPABLE\n");
break;
+ case FAMILY_8700:
+ platform_features = FFS_CAPABLE | PCIE_CAPABLE;
+ asic = ASIC_GAIA;
+ set_register_map(GAIA_IO_BASE, &gaia_register_map);
+ gp_resources = dvr_gaia_resources;
+
+ pr_info("Platform: 8700 - GAIA, DVR_CAPABLE\n");
+ break;
+
default:
pr_crit("Platform: UNKNOWN PLATFORM\n");
break;
@@ -533,10 +353,10 @@ void __init configure_platform(void)
switch (asic) {
case ASIC_ZEUS:
- phys_to_bus_offset = 0x30000000;
+ phys_to_dma_offset = 0x30000000;
break;
case ASIC_CALLIOPE:
- phys_to_bus_offset = 0x10000000;
+ phys_to_dma_offset = 0x10000000;
break;
case ASIC_CRONUSLITE:
/* Fall through */
@@ -546,42 +366,16 @@ void __init configure_platform(void)
* 0x2XXXXXXX. If 0x10000000 aliases into 0x60000000-
* 0x6XXXXXXX, the offset should be 0x50000000, not 0x10000000.
*/
- phys_to_bus_offset = 0x10000000;
+ phys_to_dma_offset = 0x10000000;
break;
default:
- phys_to_bus_offset = 0x00000000;
+ phys_to_dma_offset = 0x00000000;
break;
}
}
-/**
- * platform_devices_init - sets up USB device resourse.
- */
-static int __init platform_devices_init(void)
-{
- pr_notice("%s: ----- Initializing USB resources -----\n", __func__);
-
- asic_resource.start = asic_phy_base;
- asic_resource.end += asic_resource.start;
-
- ehci_resources[0].start = asic_reg_phys_addr(ehci_hcapbase);
- ehci_resources[0].end += ehci_resources[0].start;
-
- ohci_resources[0].start = asic_reg_phys_addr(ohci_hc_revision);
- ohci_resources[0].end += ohci_resources[0].start;
-
- set_io_port_base(0);
-
- platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
-
- return 0;
-}
-
-arch_initcall(platform_devices_init);
-
/*
- *
- * BOOTMEM ALLOCATION
+ * RESOURCE ALLOCATION
*
*/
/*
@@ -603,7 +397,7 @@ void __init platform_alloc_bootmem(void)
int size = gp_resources[i].end - gp_resources[i].start + 1;
if ((gp_resources[i].start != 0) &&
((gp_resources[i].flags & IORESOURCE_MEM) != 0)) {
- reserve_bootmem(bus_to_phys(gp_resources[i].start),
+ reserve_bootmem(dma_to_phys(gp_resources[i].start),
size, 0);
total += gp_resources[i].end -
gp_resources[i].start + 1;
@@ -627,7 +421,7 @@ void __init platform_alloc_bootmem(void)
else {
gp_resources[i].start =
- phys_to_bus(virt_to_phys(mem));
+ phys_to_dma(virt_to_phys(mem));
gp_resources[i].end =
gp_resources[i].start + size - 1;
total += size;
@@ -691,7 +485,7 @@ static void __init pmem_setup_resource(void)
if (resource && pmemaddr && pmemlen) {
/* The address provided by bootloader is in kseg0. Convert to
* a bus address. */
- resource->start = phys_to_bus(pmemaddr - 0x80000000);
+ resource->start = phys_to_dma(pmemaddr - 0x80000000);
resource->end = resource->start + pmemlen - 1;
pr_info("persistent memory: start=0x%x end=0x%x\n",
diff --git a/arch/mips/powertv/asic/prealloc-gaia.c b/arch/mips/powertv/asic/prealloc-gaia.c
new file mode 100644
index 0000000..8ac8c7a
--- /dev/null
+++ b/arch/mips/powertv/asic/prealloc-gaia.c
@@ -0,0 +1,589 @@
+/*
+ * Memory pre-allocations for Gaia boxes.
+ *
+ * Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ *
+ * Author: David VomLehn
+ */
+
+#include <linux/init.h>
+#include <asm/mach-powertv/asic.h>
+
+/*
+ * DVR_CAPABLE GAIA RESOURCES
+ */
+struct resource dvr_gaia_resources[] __initdata = {
+ /*
+ *
+ * VIDEO1 / LX1
+ *
+ */
+ {
+ .name = "ST231aImage", /* Delta-Mu 1 image and ram */
+ .start = 0x24000000,
+ .end = 0x241FFFFF, /* 2MiB */
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "ST231aMonitor", /* 8KiB block ST231a monitor */
+ .start = 0x24200000,
+ .end = 0x24201FFF,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "MediaMemory1",
+ .start = 0x24202000,
+ .end = 0x25FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
+ .flags = IORESOURCE_MEM,
+ },
+ /*
+ *
+ * VIDEO2 / LX2
+ *
+ */
+ {
+ .name = "ST231bImage", /* Delta-Mu 2 image and ram */
+ .start = 0x60000000,
+ .end = 0x601FFFFF, /* 2MiB */
+ .flags = IORESOURCE_IO,
+ },
+ {
+ .name = "ST231bMonitor", /* 8KiB block ST231b monitor */
+ .start = 0x60200000,
+ .end = 0x60201FFF,
+ .flags = IORESOURCE_IO,
+ },
+ {
+ .name = "MediaMemory2",
+ .start = 0x60202000,
+ .end = 0x61FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
+ .flags = IORESOURCE_IO,
+ },
+ /*
+ *
+ * Sysaudio Driver
+ *
+ * This driver requires:
+ *
+ * Arbitrary Based Buffers:
+ * DSP_Image_Buff - DSP code and data images (1MB)
+ * ADSC_CPU_PCM_Buff - ADSC CPU PCM buffer (40KB)
+ * ADSC_AUX_Buff - ADSC AUX buffer (16KB)
+ * ADSC_Main_Buff - ADSC Main buffer (16KB)
+ *
+ */
+ {
+ .name = "DSP_Image_Buff",
+ .start = 0x00000000,
+ .end = 0x000FFFFF,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "ADSC_CPU_PCM_Buff",
+ .start = 0x00000000,
+ .end = 0x00009FFF,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "ADSC_AUX_Buff",
+ .start = 0x00000000,
+ .end = 0x00003FFF,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "ADSC_Main_Buff",
+ .start = 0x00000000,
+ .end = 0x00003FFF,
+ .flags = IORESOURCE_MEM,
+ },
+ /*
+ *
+ * STAVEM driver/STAPI
+ *
+ * This driver requires:
+ *
+ * Arbitrary Based Buffers:
+ * This memory area is used for allocating buffers for Video decoding
+ * purposes. Allocation/De-allocation within this buffer is managed
+ * by the STAVMEM driver of the STAPI. They could be Decimated
+ * Picture Buffers, Intermediate Buffers, as deemed necessary for
+ * video decoding purposes, for any video decoders on Zeus.
+ *
+ */
+ {
+ .name = "AVMEMPartition0",
+ .start = 0x63580000,
+ .end = 0x64180000 - 1, /* 12 MB total */
+ .flags = IORESOURCE_IO,
+ },
+ /*
+ *
+ * DOCSIS Subsystem
+ *
+ * This driver requires:
+ *
+ * Arbitrary Based Buffers:
+ * Docsis -
+ *
+ */
+ {
+ .name = "Docsis",
+ .start = 0x62000000,
+ .end = 0x62700000 - 1, /* 7 MB total */
+ .flags = IORESOURCE_IO,
+ },
+ /*
+ *
+ * GHW HAL Driver
+ *
+ * This driver requires:
+ *
+ * Arbitrary Based Buffers:
+ * GraphicsHeap - PowerTV Graphics Heap
+ *
+ */
+ {
+ .name = "GraphicsHeap",
+ .start = 0x62700000,
+ .end = 0x63500000 - 1, /* 14 MB total */
+ .flags = IORESOURCE_IO,
+ },
+ /*
+ *
+ * multi com buffer area
+ *
+ * This driver requires:
+ *
+ * Arbitrary Based Buffers:
+ * Docsis -
+ *
+ */
+ {
+ .name = "MulticomSHM",
+ .start = 0x26000000,
+ .end = 0x26020000 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ /*
+ *
+ * DMA Ring buffer
+ *
+ * This driver requires:
+ *
+ * Arbitrary Based Buffers:
+ * Docsis -
+ *
+ */
+ {
+ .name = "BMM_Buffer",
+ .start = 0x00000000,
+ .end = 0x00280000 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ /*
+ *
+ * Display bins buffer for unit0
+ *
+ * This driver requires:
+ *
+ * Arbitrary Based Buffers:
+ * Display Bins for unit0
+ *
+ */
+ {
+ .name = "DisplayBins0",
+ .start = 0x00000000,
+ .end = 0x00000FFF, /* 4 KB total */
+ .flags = IORESOURCE_MEM,
+ },
+ /*
+ *
+ * Display bins buffer
+ *
+ * This driver requires:
+ *
+ * Arbitrary Based Buffers:
+ * Display Bins for unit1
+ *
+ */
+ {
+ .name = "DisplayBins1",
+ .start = 0x64AD4000,
+ .end = 0x64AD5000 - 1, /* 4 KB total */
+ .flags = IORESOURCE_IO,
+ },
+ /*
+ *
+ * ITFS
+ *
+ * This driver requires:
+ *
+ * Arbitrary Based Buffers:
+ * Docsis -
+ *
+ */
+ {
+ .name = "ITFS",
+ .start = 0x64180000,
+ /* 815,104 bytes each for 2 ITFS partitions. */
+ .end = 0x6430DFFF,
+ .flags = IORESOURCE_IO,
+ },
+ /*
+ *
+ * AVFS
+ *
+ * This driver requires:
+ *
+ * Arbitrary Based Buffers:
+ * Docsis -
+ *
+ */
+ {
+ .name = "AvfsDmaMem",
+ .start = 0x6430E000,
+ /* (945K * 8) = (128K *3) 5 playbacks / 3 server */
+ .end = 0x64AD0000 - 1,
+ .flags = IORESOURCE_IO,
+ },
+ {
+ .name = "AvfsFileSys",
+ .start = 0x64AD0000,
+ .end = 0x64AD1000 - 1, /* 4K */
+ .flags = IORESOURCE_IO,
+ },
+ /*
+ *
+ * Smartcard
+ *
+ * This driver requires:
+ *
+ * Arbitrary Based Buffers:
+ * Read and write buffers for Internal/External cards
+ *
+ */
+ {
+ .name = "SmartCardInfo",
+ .start = 0x64AD1000,
+ .end = 0x64AD3800 - 1,
+ .flags = IORESOURCE_IO,
+ },
+ /*
+ *
+ * KAVNET
+ * NP Reset Vector - must be of the form xxCxxxxx
+ * NP Image - must be video bank 1
+ * NP IPC - must be video bank 2
+ */
+ {
+ .name = "NP_Reset_Vector",
+ .start = 0x27c00000,
+ .end = 0x27c01000 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "NP_Image",
+ .start = 0x27020000,
+ .end = 0x27060000 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "NP_IPC",
+ .start = 0x63500000,
+ .end = 0x63580000 - 1,
+ .flags = IORESOURCE_IO,
+ },
+ /*
+ * Add other resources here
+ */
+ { },
+};
+
+/*
+ * NON_DVR_CAPABLE GAIA RESOURCES
+ */
+struct resource non_dvr_gaia_resources[] __initdata = {
+ /*
+ *
+ * VIDEO1 / LX1
+ *
+ */
+ {
+ .name = "ST231aImage", /* Delta-Mu 1 image and ram */
+ .start = 0x24000000,
+ .end = 0x241FFFFF, /* 2MiB */
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "ST231aMonitor", /* 8KiB block ST231a monitor */
+ .start = 0x24200000,
+ .end = 0x24201FFF,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "MediaMemory1",
+ .start = 0x24202000,
+ .end = 0x25FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
+ .flags = IORESOURCE_MEM,
+ },
+ /*
+ *
+ * VIDEO2 / LX2
+ *
+ */
+ {
+ .name = "ST231bImage", /* Delta-Mu 2 image and ram */
+ .start = 0x60000000,
+ .end = 0x601FFFFF, /* 2MiB */
+ .flags = IORESOURCE_IO,
+ },
+ {
+ .name = "ST231bMonitor", /* 8KiB block ST231b monitor */
+ .start = 0x60200000,
+ .end = 0x60201FFF,
+ .flags = IORESOURCE_IO,
+ },
+ {
+ .name = "MediaMemory2",
+ .start = 0x60202000,
+ .end = 0x61FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
+ .flags = IORESOURCE_IO,
+ },
+ /*
+ *
+ * Sysaudio Driver
+ *
+ * This driver requires:
+ *
+ * Arbitrary Based Buffers:
+ * DSP_Image_Buff - DSP code and data images (1MB)
+ * ADSC_CPU_PCM_Buff - ADSC CPU PCM buffer (40KB)
+ * ADSC_AUX_Buff - ADSC AUX buffer (16KB)
+ * ADSC_Main_Buff - ADSC Main buffer (16KB)
+ *
+ */
+ {
+ .name = "DSP_Image_Buff",
+ .start = 0x00000000,
+ .end = 0x000FFFFF,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "ADSC_CPU_PCM_Buff",
+ .start = 0x00000000,
+ .end = 0x00009FFF,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "ADSC_AUX_Buff",
+ .start = 0x00000000,
+ .end = 0x00003FFF,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "ADSC_Main_Buff",
+ .start = 0x00000000,
+ .end = 0x00003FFF,
+ .flags = IORESOURCE_MEM,
+ },
+ /*
+ *
+ * STAVEM driver/STAPI
+ *
+ * This driver requires:
+ *
+ * Arbitrary Based Buffers:
+ * This memory area is used for allocating buffers for Video decoding
+ * purposes. Allocation/De-allocation within this buffer is managed
+ * by the STAVMEM driver of the STAPI. They could be Decimated
+ * Picture Buffers, Intermediate Buffers, as deemed necessary for
+ * video decoding purposes, for any video decoders on Zeus.
+ *
+ */
+ {
+ .name = "AVMEMPartition0",
+ .start = 0x63580000,
+ .end = 0x64180000 - 1, /* 12 MB total */
+ .flags = IORESOURCE_IO,
+ },
+ /*
+ *
+ * DOCSIS Subsystem
+ *
+ * This driver requires:
+ *
+ * Arbitrary Based Buffers:
+ * Docsis -
+ *
+ */
+ {
+ .name = "Docsis",
+ .start = 0x62000000,
+ .end = 0x62700000 - 1, /* 7 MB total */
+ .flags = IORESOURCE_IO,
+ },
+ /*
+ *
+ * GHW HAL Driver
+ *
+ * This driver requires:
+ *
+ * Arbitrary Based Buffers:
+ * GraphicsHeap - PowerTV Graphics Heap
+ *
+ */
+ {
+ .name = "GraphicsHeap",
+ .start = 0x62700000,
+ .end = 0x63500000 - 1, /* 14 MB total */
+ .flags = IORESOURCE_IO,
+ },
+ /*
+ *
+ * multi com buffer area
+ *
+ * This driver requires:
+ *
+ * Arbitrary Based Buffers:
+ * Docsis -
+ *
+ */
+ {
+ .name = "MulticomSHM",
+ .start = 0x26000000,
+ .end = 0x26020000 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ /*
+ *
+ * DMA Ring buffer
+ *
+ * This driver requires:
+ *
+ * Arbitrary Based Buffers:
+ * Docsis -
+ *
+ */
+ {
+ .name = "BMM_Buffer",
+ .start = 0x00000000,
+ .end = 0x000AA000 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ /*
+ *
+ * Display bins buffer for unit0
+ *
+ * This driver requires:
+ *
+ * Arbitrary Based Buffers:
+ * Display Bins for unit0
+ *
+ */
+ {
+ .name = "DisplayBins0",
+ .start = 0x00000000,
+ .end = 0x00000FFF, /* 4 KB total */
+ .flags = IORESOURCE_MEM,
+ },
+ /*
+ *
+ * Display bins buffer
+ *
+ * This driver requires:
+ *
+ * Arbitrary Based Buffers:
+ * Display Bins for unit1
+ *
+ */
+ {
+ .name = "DisplayBins1",
+ .start = 0x64AD4000,
+ .end = 0x64AD5000 - 1, /* 4 KB total */
+ .flags = IORESOURCE_IO,
+ },
+ /*
+ *
+ * AVFS: player HAL memory
+ *
+ *
+ */
+ {
+ .name = "AvfsDmaMem",
+ .start = 0x6430E000,
+ .end = 0x645D2C00 - 1, /* 945K * 3 for playback */
+ .flags = IORESOURCE_IO,
+ },
+ /*
+ *
+ * PMEM
+ *
+ * This driver requires:
+ *
+ * Arbitrary Based Buffers:
+ * Persistent memory for diagnostics.
+ *
+ */
+ {
+ .name = "DiagPersistentMemory",
+ .start = 0x00000000,
+ .end = 0x10000 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ /*
+ *
+ * Smartcard
+ *
+ * This driver requires:
+ *
+ * Arbitrary Based Buffers:
+ * Read and write buffers for Internal/External cards
+ *
+ */
+ {
+ .name = "SmartCardInfo",
+ .start = 0x64AD1000,
+ .end = 0x64AD3800 - 1,
+ .flags = IORESOURCE_IO,
+ },
+ /*
+ *
+ * KAVNET
+ * NP Reset Vector - must be of the form xxCxxxxx
+ * NP Image - must be video bank 1
+ * NP IPC - must be video bank 2
+ */
+ {
+ .name = "NP_Reset_Vector",
+ .start = 0x27c00000,
+ .end = 0x27c01000 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "NP_Image",
+ .start = 0x27020000,
+ .end = 0x27060000 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "NP_IPC",
+ .start = 0x63500000,
+ .end = 0x63580000 - 1,
+ .flags = IORESOURCE_IO,
+ },
+ { },
+};
diff --git a/arch/mips/powertv/init.c b/arch/mips/powertv/init.c
index 0afe227..8355228 100644
--- a/arch/mips/powertv/init.c
+++ b/arch/mips/powertv/init.c
@@ -117,8 +117,10 @@ void __init prom_init(void)
board_nmi_handler_setup = mips_nmi_setup;
board_ejtag_handler_setup = mips_ejtag_setup;
- if (prom_argc == 1)
+ if (prom_argc == 1) {
+ strlcat(arcs_cmdline, " ", COMMAND_LINE_SIZE);
strlcat(arcs_cmdline, prom_argv, COMMAND_LINE_SIZE);
+ }
configure_platform();
prom_meminit();
diff --git a/arch/mips/powertv/ioremap.c b/arch/mips/powertv/ioremap.c
new file mode 100644
index 0000000..a77c6f6
--- /dev/null
+++ b/arch/mips/powertv/ioremap.c
@@ -0,0 +1,136 @@
+/*
+ * ioremap.c
+ *
+ * Support for mapping between dma_addr_t values a phys_addr_t values.
+ *
+ * Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ *
+ * Author: David VomLehn <dvomlehn@cisco.com>
+ *
+ * Description: Defines the platform resources for the SA settop.
+ *
+ * NOTE: The bootloader allocates persistent memory at an address which is
+ * 16 MiB below the end of the highest address in KSEG0. All fixed
+ * address memory reservations must avoid this region.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+
+#include <asm/mach-powertv/ioremap.h>
+
+/*
+ * Define the sizes of and masks for grains in physical and DMA space. The
+ * values are the same but the types are not.
+ */
+#define IOR_PHYS_GRAIN ((phys_addr_t) 1 << IOR_LSBITS)
+#define IOR_PHYS_GRAIN_MASK (IOR_PHYS_GRAIN - 1)
+
+#define IOR_DMA_GRAIN ((dma_addr_t) 1 << IOR_LSBITS)
+#define IOR_DMA_GRAIN_MASK (IOR_DMA_GRAIN - 1)
+
+/*
+ * Values that, when accessed by an index derived from a phys_addr_t and
+ * added to phys_addr_t value, yield a DMA address
+ */
+struct ior_phys_to_dma _ior_phys_to_dma[IOR_NUM_PHYS_TO_DMA];
+EXPORT_SYMBOL(_ior_phys_to_dma);
+
+/*
+ * Values that, when accessed by an index derived from a dma_addr_t and
+ * added to that dma_addr_t value, yield a physical address
+ */
+struct ior_dma_to_phys _ior_dma_to_phys[IOR_NUM_DMA_TO_PHYS];
+EXPORT_SYMBOL(_ior_dma_to_phys);
+
+/**
+ * setup_dma_to_phys - set up conversion from DMA to physical addresses
+ * @dma_idx: Top IOR_LSBITS bits of the DMA address, i.e. an index
+ * into the array _dma_to_phys.
+ * @delta: Value that, when added to the DMA address, will yield the
+ * physical address
+ * @s: Number of bytes in the section of memory with the given delta
+ * between DMA and physical addresses.
+ */
+static void setup_dma_to_phys(dma_addr_t dma, phys_addr_t delta, dma_addr_t s)
+{
+ int dma_idx, first_idx, last_idx;
+ phys_addr_t first, last;
+
+ /*
+ * Calculate the first and last indices, rounding the first up and
+ * the second down.
+ */
+ first = dma & ~IOR_DMA_GRAIN_MASK;
+ last = (dma + s - 1) & ~IOR_DMA_GRAIN_MASK;
+ first_idx = first >> IOR_LSBITS; /* Convert to indices */
+ last_idx = last >> IOR_LSBITS;
+
+ for (dma_idx = first_idx; dma_idx <= last_idx; dma_idx++)
+ _ior_dma_to_phys[dma_idx].offset = delta >> IOR_DMA_SHIFT;
+}
+
+/**
+ * setup_phys_to_dma - set up conversion from DMA to physical addresses
+ * @phys_idx: Top IOR_LSBITS bits of the DMA address, i.e. an index
+ * into the array _phys_to_dma.
+ * @delta: Value that, when added to the DMA address, will yield the
+ * physical address
+ * @s: Number of bytes in the section of memory with the given delta
+ * between DMA and physical addresses.
+ */
+static void setup_phys_to_dma(phys_addr_t phys, dma_addr_t delta, phys_addr_t s)
+{
+ int phys_idx, first_idx, last_idx;
+ phys_addr_t first, last;
+
+ /*
+ * Calculate the first and last indices, rounding the first up and
+ * the second down.
+ */
+ first = phys & ~IOR_PHYS_GRAIN_MASK;
+ last = (phys + s - 1) & ~IOR_PHYS_GRAIN_MASK;
+ first_idx = first >> IOR_LSBITS; /* Convert to indices */
+ last_idx = last >> IOR_LSBITS;
+
+ for (phys_idx = first_idx; phys_idx <= last_idx; phys_idx++)
+ _ior_phys_to_dma[phys_idx].offset = delta >> IOR_PHYS_SHIFT;
+}
+
+/**
+ * ioremap_add_map - add to the physical and DMA address conversion arrays
+ * @phys: Process's view of the address of the start of the memory chunk
+ * @dma: DMA address of the start of the memory chunk
+ * @size: Size, in bytes, of the chunk of memory
+ *
+ * NOTE: It might be obvious, but the assumption is that all @size bytes have
+ * the same offset between the physical address and the DMA address.
+ */
+void ioremap_add_map(phys_addr_t phys, phys_addr_t dma, phys_addr_t size)
+{
+ if (size == 0)
+ return;
+
+ if ((dma & IOR_DMA_GRAIN_MASK) != 0 ||
+ (phys & IOR_PHYS_GRAIN_MASK) != 0 ||
+ (size & IOR_PHYS_GRAIN_MASK) != 0)
+ pr_crit("Memory allocation must be in chunks of 0x%x bytes\n",
+ IOR_PHYS_GRAIN);
+
+ setup_dma_to_phys(dma, phys - dma, size);
+ setup_phys_to_dma(phys, dma - phys, size);
+}
diff --git a/arch/mips/powertv/memory.c b/arch/mips/powertv/memory.c
index f49eb3d..73880ad 100644
--- a/arch/mips/powertv/memory.c
+++ b/arch/mips/powertv/memory.c
@@ -30,28 +30,141 @@
#include <asm/sections.h>
#include <asm/mips-boards/prom.h>
+#include <asm/mach-powertv/asic.h>
+#include <asm/mach-powertv/ioremap.h>
#include "init.h"
/* Memory constants */
#define KIBIBYTE(n) ((n) * 1024) /* Number of kibibytes */
#define MEBIBYTE(n) ((n) * KIBIBYTE(1024)) /* Number of mebibytes */
-#define DEFAULT_MEMSIZE MEBIBYTE(256) /* If no memsize provided */
-#define LOW_MEM_MAX MEBIBYTE(252) /* Max usable low mem */
-#define RES_BOOTLDR_MEMSIZE MEBIBYTE(1) /* Memory reserved for bldr */
-#define BOOT_MEM_SIZE KIBIBYTE(256) /* Memory reserved for bldr */
-#define PHYS_MEM_START 0x10000000 /* Start of physical memory */
+#define DEFAULT_MEMSIZE MEBIBYTE(128) /* If no memsize provided */
-char __initdata cmdline[COMMAND_LINE_SIZE];
+#define BLDR_SIZE KIBIBYTE(256) /* Memory reserved for bldr */
+#define RV_SIZE MEBIBYTE(4) /* Size of reset vector */
-void __init prom_meminit(void)
+#define LOW_MEM_END 0x20000000 /* Highest low memory address */
+#define BLDR_ALIAS 0x10000000 /* Bootloader address */
+#define RV_PHYS 0x1fc00000 /* Reset vector address */
+#define LOW_RAM_END RV_PHYS /* End of real RAM in low mem */
+
+/*
+ * Very low-level conversion from processor physical address to device
+ * DMA address for the first bank of memory.
+ */
+#define PHYS_TO_DMA(paddr) ((paddr) + (CONFIG_LOW_RAM_DMA - LOW_RAM_ALIAS))
+
+unsigned long ptv_memsize;
+
+/*
+ * struct low_mem_reserved - Items in low memmory that are reserved
+ * @start: Physical address of item
+ * @size: Size, in bytes, of this item
+ * @is_aliased: True if this is RAM aliased from another location. If false,
+ * it is something other than aliased RAM and the RAM in the
+ * unaliased address is still visible outside of low memory.
+ */
+struct low_mem_reserved {
+ phys_addr_t start;
+ phys_addr_t size;
+ bool is_aliased;
+};
+
+/*
+ * Must be in ascending address order
+ */
+struct low_mem_reserved low_mem_reserved[] = {
+ {BLDR_ALIAS, BLDR_SIZE, true}, /* Bootloader RAM */
+ {RV_PHYS, RV_SIZE, false}, /* Reset vector */
+};
+
+/*
+ * struct mem_layout - layout of a piece of the system RAM
+ * @phys: Physical address of the start of this piece of RAM. This is the
+ * address at which both the processor and I/O devices see the
+ * RAM.
+ * @alias: Alias of this piece of memory in order to make it appear in
+ * the low memory part of the processor's address space. I/O
+ * devices don't see anything here.
+ * @size: Size, in bytes, of this piece of RAM
+ */
+struct mem_layout {
+ phys_addr_t phys;
+ phys_addr_t alias;
+ phys_addr_t size;
+};
+
+/*
+ * struct mem_layout_list - list descriptor for layouts of system RAM pieces
+ * @family: Specifies the family being described
+ * @n: Number of &struct mem_layout elements
+ * @layout: Pointer to the list of &mem_layout structures
+ */
+struct mem_layout_list {
+ enum family_type family;
+ size_t n;
+ struct mem_layout *layout;
+};
+
+static struct mem_layout f1500_layout[] = {
+ {0x20000000, 0x10000000, MEBIBYTE(256)},
+};
+
+static struct mem_layout f4500_layout[] = {
+ {0x40000000, 0x10000000, MEBIBYTE(256)},
+ {0x20000000, 0x20000000, MEBIBYTE(32)},
+};
+
+static struct mem_layout f8500_layout[] = {
+ {0x40000000, 0x10000000, MEBIBYTE(256)},
+ {0x20000000, 0x20000000, MEBIBYTE(32)},
+ {0x30000000, 0x30000000, MEBIBYTE(32)},
+};
+
+static struct mem_layout fx600_layout[] = {
+ {0x20000000, 0x10000000, MEBIBYTE(256)},
+ {0x60000000, 0x60000000, MEBIBYTE(128)},
+};
+
+static struct mem_layout_list layout_list[] = {
+ {FAMILY_1500, ARRAY_SIZE(f1500_layout), f1500_layout},
+ {FAMILY_1500VZE, ARRAY_SIZE(f1500_layout), f1500_layout},
+ {FAMILY_1500VZF, ARRAY_SIZE(f1500_layout), f1500_layout},
+ {FAMILY_4500, ARRAY_SIZE(f4500_layout), f4500_layout},
+ {FAMILY_8500, ARRAY_SIZE(f8500_layout), f8500_layout},
+ {FAMILY_8500RNG, ARRAY_SIZE(f8500_layout), f8500_layout},
+ {FAMILY_4600, ARRAY_SIZE(fx600_layout), fx600_layout},
+ {FAMILY_4600VZA, ARRAY_SIZE(fx600_layout), fx600_layout},
+ {FAMILY_8600, ARRAY_SIZE(fx600_layout), fx600_layout},
+ {FAMILY_8600VZB, ARRAY_SIZE(fx600_layout), fx600_layout},
+};
+
+/* If we can't determine the layout, use this */
+static struct mem_layout default_layout[] = {
+ {0x20000000, 0x10000000, MEBIBYTE(128)},
+};
+
+/**
+ * register_non_ram - register low memory not available for RAM usage
+ */
+static __init void register_non_ram(void)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(low_mem_reserved); i++)
+ add_memory_region(low_mem_reserved[i].start,
+ low_mem_reserved[i].size, BOOT_MEM_RESERVED);
+}
+
+/**
+ * get_memsize - get the size of memory as a single bank
+ */
+static phys_addr_t get_memsize(void)
{
+ static char cmdline[COMMAND_LINE_SIZE] __initdata;
+ phys_addr_t memsize = 0;
char *memsize_str;
- unsigned long memsize = 0;
- unsigned int physend;
char *ptr;
- int low_mem;
- int high_mem;
/* Check the command line first for a memsize directive */
strcpy(cmdline, arcs_cmdline);
@@ -73,96 +186,156 @@ void __init prom_meminit(void)
if (memsize == 0) {
if (_prom_memsize != 0) {
memsize = _prom_memsize;
- pr_info("_prom_memsize = 0x%lx\n", memsize);
+ pr_info("_prom_memsize = 0x%x\n", memsize);
/* add in memory that the bootloader doesn't
* report */
- memsize += BOOT_MEM_SIZE;
+ memsize += BLDR_SIZE;
} else {
memsize = DEFAULT_MEMSIZE;
pr_info("Memsize not passed by bootloader, "
- "defaulting to 0x%lx\n", memsize);
+ "defaulting to 0x%x\n", memsize);
}
}
}
- physend = PFN_ALIGN(&_end) - 0x80000000;
- if (memsize > LOW_MEM_MAX) {
- low_mem = LOW_MEM_MAX;
- high_mem = memsize - low_mem;
- } else {
- low_mem = memsize;
- high_mem = 0;
+ return memsize;
+}
+
+/**
+ * register_low_ram - register an aliased section of RAM
+ * @p: Alias address of memory
+ * @n: Number of bytes in this section of memory
+ *
+ * Returns the number of bytes registered
+ *
+ */
+static __init phys_addr_t register_low_ram(phys_addr_t p, phys_addr_t n)
+{
+ phys_addr_t s;
+ int i;
+ phys_addr_t orig_n;
+
+ orig_n = n;
+
+ BUG_ON(p + n > RV_PHYS);
+
+ for (i = 0; n != 0 && i < ARRAY_SIZE(low_mem_reserved); i++) {
+ phys_addr_t start;
+ phys_addr_t size;
+
+ start = low_mem_reserved[i].start;
+ size = low_mem_reserved[i].size;
+
+ /* Handle memory before this low memory section */
+ if (p < start) {
+ phys_addr_t s;
+ s = min(n, start - p);
+ add_memory_region(p, s, BOOT_MEM_RAM);
+ p += s;
+ n -= s;
+ }
+
+ /* Handle the low memory section itself. If it's aliased,
+ * we reduce the number of byes left, but if not, the RAM
+ * is available elsewhere and we don't reduce the number of
+ * bytes remaining. */
+ if (p == start) {
+ if (low_mem_reserved[i].is_aliased) {
+ s = min(n, size);
+ n -= s;
+ p += s;
+ } else
+ p += n;
+ }
}
+ return orig_n - n;
+}
+
/*
- * TODO: We will use the hard code for memory configuration until
- * the bootloader releases their device tree to us.
+ * register_ram - register real RAM
+ * @p: Address of memory as seen by devices
+ * @alias: If the memory is seen at an additional address by the processor,
+ * this will be the address, otherwise it is the same as @p.
+ * @n: Number of bytes in this section of memory
*/
+static __init void register_ram(phys_addr_t p, phys_addr_t alias,
+ phys_addr_t n)
+{
/*
- * Add the memory reserved for use by the bootloader to the
- * memory map.
- */
- add_memory_region(PHYS_MEM_START, RES_BOOTLDR_MEMSIZE,
- BOOT_MEM_RESERVED);
-#ifdef CONFIG_HIGHMEM_256_128
- /*
- * Add memory in low for general use by the kernel and its friends
- * (like drivers, applications, etc).
- */
- add_memory_region(PHYS_MEM_START + RES_BOOTLDR_MEMSIZE,
- LOW_MEM_MAX - RES_BOOTLDR_MEMSIZE, BOOT_MEM_RAM);
- /*
- * Add the memory reserved for reset vector.
- */
- add_memory_region(0x1fc00000, MEBIBYTE(4), BOOT_MEM_RESERVED);
- /*
- * Add the memory reserved.
- */
- add_memory_region(0x20000000, MEBIBYTE(1024 + 75), BOOT_MEM_RESERVED);
- /*
- * Add memory in high for general use by the kernel and its friends
- * (like drivers, applications, etc).
- *
- * 75MB is reserved for devices which are using the memory in high.
- */
- add_memory_region(0x60000000 + MEBIBYTE(75), MEBIBYTE(128 - 75),
- BOOT_MEM_RAM);
-#elif defined CONFIG_HIGHMEM_128_128
- /*
- * Add memory in low for general use by the kernel and its friends
- * (like drivers, applications, etc).
- */
- add_memory_region(PHYS_MEM_START + RES_BOOTLDR_MEMSIZE,
- MEBIBYTE(128) - RES_BOOTLDR_MEMSIZE, BOOT_MEM_RAM);
- /*
- * Add the memory reserved.
- */
- add_memory_region(PHYS_MEM_START + MEBIBYTE(128),
- MEBIBYTE(128 + 1024 + 75), BOOT_MEM_RESERVED);
- /*
- * Add memory in high for general use by the kernel and its friends
- * (like drivers, applications, etc).
- *
- * 75MB is reserved for devices which are using the memory in high.
- */
- add_memory_region(0x60000000 + MEBIBYTE(75), MEBIBYTE(128 - 75),
- BOOT_MEM_RAM);
-#else
- /* Add low memory regions for either:
- * - no-highmemory configuration case -OR-
- * - highmemory "HIGHMEM_LOWBANK_ONLY" case
- */
- /*
- * Add memory for general use by the kernel and its friends
- * (like drivers, applications, etc).
+ * If some or all of this memory has an alias, break it into the
+ * aliased and non-aliased portion.
*/
- add_memory_region(PHYS_MEM_START + RES_BOOTLDR_MEMSIZE,
- low_mem - RES_BOOTLDR_MEMSIZE, BOOT_MEM_RAM);
+ if (p != alias) {
+ phys_addr_t alias_size;
+ phys_addr_t registered;
+
+ alias_size = min(n, LOW_RAM_END - alias);
+ registered = register_low_ram(alias, alias_size);
+ ioremap_add_map(alias, p, n);
+ n -= registered;
+ p += registered;
+ }
+
+#ifdef CONFIG_HIGHMEM
+ if (n != 0) {
+ add_memory_region(p, n, BOOT_MEM_RAM);
+ ioremap_add_map(p, p, n);
+ }
+#endif
+}
+
+/**
+ * register_address_space - register things in the address space
+ * @memsize: Number of bytes of RAM installed
+ *
+ * Takes the given number of bytes of RAM and registers as many of the regions,
+ * or partial regions, as it can. So, the default configuration might have
+ * two regions with 256 MiB each. If the memsize passed in on the command line
+ * is 384 MiB, it will register the first region with 256 MiB and the second
+ * with 128 MiB.
+ */
+static __init void register_address_space(phys_addr_t memsize)
+{
+ int i;
+ phys_addr_t size;
+ size_t n;
+ struct mem_layout *layout;
+ enum family_type family;
+
/*
- * Add the memory reserved for reset vector.
+ * Register all of the things that aren't available to the kernel as
+ * memory.
*/
- add_memory_region(0x1fc00000, MEBIBYTE(4), BOOT_MEM_RESERVED);
-#endif
+ register_non_ram();
+
+ /* Find the appropriate memory description */
+ family = platform_get_family();
+
+ for (i = 0; i < ARRAY_SIZE(layout_list); i++) {
+ if (layout_list[i].family == family)
+ break;
+ }
+
+ if (i == ARRAY_SIZE(layout_list)) {
+ n = ARRAY_SIZE(default_layout);
+ layout = default_layout;
+ } else {
+ n = layout_list[i].n;
+ layout = layout_list[i].layout;
+ }
+
+ for (i = 0; memsize != 0 && i < n; i++) {
+ size = min(memsize, layout[i].size);
+ register_ram(layout[i].phys, layout[i].alias, size);
+ memsize -= size;
+ }
+}
+
+void __init prom_meminit(void)
+{
+ ptv_memsize = get_memsize();
+ register_address_space(ptv_memsize);
}
void __init prom_free_prom_memory(void)
diff --git a/arch/mips/powertv/powertv-usb.c b/arch/mips/powertv/powertv-usb.c
new file mode 100644
index 0000000..6ac85cf
--- /dev/null
+++ b/arch/mips/powertv/powertv-usb.c
@@ -0,0 +1,403 @@
+/*
+ * powertv-usb.c
+ *
+ * Description: ASIC-specific USB device setup and shutdown
+ *
+ * Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
+ * Copyright (C) 2009 Cisco Systems, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ *
+ * Author: Ken Eppinett
+ * David Schleef <ds@schleef.org>
+ *
+ * NOTE: The bootloader allocates persistent memory at an address which is
+ * 16 MiB below the end of the highest address in KSEG0. All fixed
+ * address memory reservations must avoid this region.
+ */
+
+#include <linux/kernel.h>
+#include <linux/ioport.h>
+#include <linux/platform_device.h>
+#include <asm/mach-powertv/asic.h>
+#include <asm/mach-powertv/interrupts.h>
+
+/* misc_clk_ctl1 values */
+#define MCC1_30MHZ_POWERUP_SELECT (1 << 14)
+#define MCC1_DIV9 (1 << 13)
+#define MCC1_ETHMIPS_POWERUP_SELECT (1 << 11)
+#define MCC1_USB_POWERUP_SELECT (1 << 1)
+#define MCC1_CLOCK108_POWERUP_SELECT (1 << 0)
+
+/* Possible values for clock select */
+#define MCC1_USB_CLOCK_HIGH_Z (0 << 4)
+#define MCC1_USB_CLOCK_48MHZ (1 << 4)
+#define MCC1_USB_CLOCK_24MHZ (2 << 4)
+#define MCC1_USB_CLOCK_6MHZ (3 << 4)
+
+#define MCC1_CONFIG (MCC1_30MHZ_POWERUP_SELECT | \
+ MCC1_DIV9 | \
+ MCC1_ETHMIPS_POWERUP_SELECT | \
+ MCC1_USB_POWERUP_SELECT | \
+ MCC1_CLOCK108_POWERUP_SELECT)
+
+/* misc_clk_ctl2 values */
+#define MCC2_GMII_GCLK_TO_PAD (1 << 31)
+#define MCC2_ETHER125_0_CLOCK_SELECT (1 << 29)
+#define MCC2_RMII_0_CLOCK_SELECT (1 << 28)
+#define MCC2_GMII_TX0_CLOCK_SELECT (1 << 27)
+#define MCC2_GMII_RX0_CLOCK_SELECT (1 << 26)
+#define MCC2_ETHER125_1_CLOCK_SELECT (1 << 24)
+#define MCC2_RMII_1_CLOCK_SELECT (1 << 23)
+#define MCC2_GMII_TX1_CLOCK_SELECT (1 << 22)
+#define MCC2_GMII_RX1_CLOCK_SELECT (1 << 21)
+#define MCC2_ETHER125_2_CLOCK_SELECT (1 << 19)
+#define MCC2_RMII_2_CLOCK_SELECT (1 << 18)
+#define MCC2_GMII_TX2_CLOCK_SELECT (1 << 17)
+#define MCC2_GMII_RX2_CLOCK_SELECT (1 << 16)
+
+#define ETHER_CLK_CONFIG (MCC2_GMII_GCLK_TO_PAD | \
+ MCC2_ETHER125_0_CLOCK_SELECT | \
+ MCC2_RMII_0_CLOCK_SELECT | \
+ MCC2_GMII_TX0_CLOCK_SELECT | \
+ MCC2_GMII_RX0_CLOCK_SELECT | \
+ MCC2_ETHER125_1_CLOCK_SELECT | \
+ MCC2_RMII_1_CLOCK_SELECT | \
+ MCC2_GMII_TX1_CLOCK_SELECT | \
+ MCC2_GMII_RX1_CLOCK_SELECT | \
+ MCC2_ETHER125_2_CLOCK_SELECT | \
+ MCC2_RMII_2_CLOCK_SELECT | \
+ MCC2_GMII_TX2_CLOCK_SELECT | \
+ MCC2_GMII_RX2_CLOCK_SELECT)
+
+/* misc_clk_ctl2 definitions for Gaia */
+#define FSX4A_REF_SELECT (1 << 16)
+#define FSX4B_REF_SELECT (1 << 17)
+#define FSX4C_REF_SELECT (1 << 18)
+#define DDR_PLL_REF_SELECT (1 << 19)
+#define MIPS_PLL_REF_SELECT (1 << 20)
+
+/* Definitions for the QAM frequency select register FS432X4A4_QAM_CTL */
+#define QAM_FS_SDIV_SHIFT 29
+#define QAM_FS_MD_SHIFT 24
+#define QAM_FS_MD_MASK 0x1f /* Cut down to 5 bits */
+#define QAM_FS_PE_SHIFT 8
+
+#define QAM_FS_DISABLE_DIVIDE_BY_3 (1 << 5)
+#define QAM_FS_ENABLE_PROGRAM (1 << 4)
+#define QAM_FS_ENABLE_OUTPUT (1 << 3)
+#define QAM_FS_SELECT_TEST_BYPASS (1 << 2)
+#define QAM_FS_DISABLE_DIGITAL_STANDBY (1 << 1)
+#define QAM_FS_CHOOSE_FS (1 << 0)
+
+/* Definitions for fs432x4a_ctl register */
+#define QAM_FS_NSDIV_54MHZ (1 << 2)
+
+/* Definitions for bcm1_usb2_ctl register */
+#define BCM1_USB2_CTL_BISTOK (1 << 11)
+#define BCM1_USB2_CTL_PORT2_SHIFT_JK (1 << 7)
+#define BCM1_USB2_CTL_PORT1_SHIFT_JK (1 << 6)
+#define BCM1_USB2_CTL_PORT2_FAST_EDGE (1 << 5)
+#define BCM1_USB2_CTL_PORT1_FAST_EDGE (1 << 4)
+#define BCM1_USB2_CTL_EHCI_PRT_PWR_ACTIVE_HIGH (1 << 1)
+#define BCM1_USB2_CTL_APP_PRT_OVRCUR_IN_ACTIVE_HIGH (1 << 0)
+
+/* Definitions for crt_spare register */
+#define CRT_SPARE_PORT2_SHIFT_JK (1 << 21)
+#define CRT_SPARE_PORT1_SHIFT_JK (1 << 20)
+#define CRT_SPARE_PORT2_FAST_EDGE (1 << 19)
+#define CRT_SPARE_PORT1_FAST_EDGE (1 << 18)
+#define CRT_SPARE_DIVIDE_BY_9_FROM_432 (1 << 17)
+#define CRT_SPARE_USB_DIVIDE_BY_9 (1 << 16)
+
+/* Definitions for usb2_stbus_obc register */
+#define USB_STBUS_OBC_STORE32_LOAD32 0x3
+
+/* Definitions for usb2_stbus_mess_size register */
+#define USB2_STBUS_MESS_SIZE_2 0x1 /* 2 packets */
+
+/* Definitions for usb2_stbus_chunk_size register */
+#define USB2_STBUS_CHUNK_SIZE_2 0x1 /* 2 packets */
+
+/* Definitions for usb2_strap register */
+#define USB2_STRAP_HFREQ_SELECT 0x1
+
+/*
+ * USB Host Resource Definition
+ */
+
+static struct resource ehci_resources[] = {
+ {
+ .parent = &asic_resource,
+ .start = 0,
+ .end = 0xff,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = irq_usbehci,
+ .end = irq_usbehci,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static u64 ehci_dmamask = 0xffffffffULL;
+
+static struct platform_device ehci_device = {
+ .name = "powertv-ehci",
+ .id = 0,
+ .num_resources = 2,
+ .resource = ehci_resources,
+ .dev = {
+ .dma_mask = &ehci_dmamask,
+ .coherent_dma_mask = 0xffffffff,
+ },
+};
+
+static struct resource ohci_resources[] = {
+ {
+ .parent = &asic_resource,
+ .start = 0,
+ .end = 0xff,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = irq_usbohci,
+ .end = irq_usbohci,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static u64 ohci_dmamask = 0xffffffffULL;
+
+static struct platform_device ohci_device = {
+ .name = "powertv-ohci",
+ .id = 0,
+ .num_resources = 2,
+ .resource = ohci_resources,
+ .dev = {
+ .dma_mask = &ohci_dmamask,
+ .coherent_dma_mask = 0xffffffff,
+ },
+};
+
+static unsigned usb_users;
+static DEFINE_SPINLOCK(usb_regs_lock);
+
+/*
+ *
+ * fs_update - set frequency synthesizer for USB
+ * @pe_bits Phase tap setting
+ * @md_bits Coarse selector bus for algorithm of phase tap
+ * @sdiv_bits Output divider setting
+ * @disable_div_by_3 Either QAM_FS_DISABLE_DIVIDE_BY_3 or zero
+ * @standby Either QAM_FS_DISABLE_DIGITAL_STANDBY or zero
+ *
+ * QAM frequency selection code, which affects the frequency at which USB
+ * runs. The frequency is calculated as:
+ * 2^15 * ndiv * Fin
+ * Fout = ------------------------------------------------------------
+ * (sdiv * (ipe * (1 + md/32) - (ipe - 2^15)*(1 + (md + 1)/32)))
+ * where:
+ * Fin 54 MHz
+ * ndiv QAM_FS_NSDIV_54MHZ ? 8 : 16
+ * sdiv 1 << (sdiv_bits + 1)
+ * ipe Same as pe_bits
+ * md A five-bit, two's-complement integer (range [-16, 15]), which
+ * is the lower 5 bits of md_bits.
+ */
+static void fs_update(u32 pe_bits, int md_bits, u32 sdiv_bits,
+ u32 disable_div_by_3, u32 standby)
+{
+ u32 val;
+
+ val = ((sdiv_bits << QAM_FS_SDIV_SHIFT) |
+ ((md_bits & QAM_FS_MD_MASK) << QAM_FS_MD_SHIFT) |
+ (pe_bits << QAM_FS_PE_SHIFT) |
+ QAM_FS_ENABLE_OUTPUT |
+ standby |
+ disable_div_by_3);
+ asic_write(val, fs432x4b4_usb_ctl);
+ asic_write(val | QAM_FS_ENABLE_PROGRAM, fs432x4b4_usb_ctl);
+ asic_write(val | QAM_FS_ENABLE_PROGRAM | QAM_FS_CHOOSE_FS,
+ fs432x4b4_usb_ctl);
+}
+
+/*
+ * usb_eye_configure - for optimizing the shape USB eye waveform
+ * @set: Bits to set in the register
+ * @clear: Bits to clear in the register; each bit with a one will
+ * be set in the register, zero bits will not be modified
+ */
+static void usb_eye_configure(u32 set, u32 clear)
+{
+ u32 old;
+
+ old = asic_read(crt_spare);
+ old |= set;
+ old &= ~clear;
+ asic_write(old, crt_spare);
+}
+
+/*
+ * platform_configure_usb - usb configuration based on platform type.
+ */
+static void platform_configure_usb(void)
+{
+ u32 bcm1_usb2_ctl_value;
+ enum asic_type asic_type;
+ unsigned long flags;
+
+ spin_lock_irqsave(&usb_regs_lock, flags);
+ usb_users++;
+
+ if (usb_users != 1) {
+ spin_unlock_irqrestore(&usb_regs_lock, flags);
+ return;
+ }
+
+ asic_type = platform_get_asic();
+
+ switch (asic_type) {
+ case ASIC_ZEUS:
+ fs_update(0x0000, -15, 0x02, 0, 0);
+ bcm1_usb2_ctl_value = BCM1_USB2_CTL_EHCI_PRT_PWR_ACTIVE_HIGH |
+ BCM1_USB2_CTL_APP_PRT_OVRCUR_IN_ACTIVE_HIGH;
+ break;
+
+ case ASIC_CRONUS:
+ case ASIC_CRONUSLITE:
+ usb_eye_configure(0, CRT_SPARE_USB_DIVIDE_BY_9);
+ fs_update(0x8000, -14, 0x03, QAM_FS_DISABLE_DIVIDE_BY_3,
+ QAM_FS_DISABLE_DIGITAL_STANDBY);
+ bcm1_usb2_ctl_value = BCM1_USB2_CTL_EHCI_PRT_PWR_ACTIVE_HIGH |
+ BCM1_USB2_CTL_APP_PRT_OVRCUR_IN_ACTIVE_HIGH;
+ break;
+
+ case ASIC_CALLIOPE:
+ fs_update(0x0000, -15, 0x02, QAM_FS_DISABLE_DIVIDE_BY_3,
+ QAM_FS_DISABLE_DIGITAL_STANDBY);
+
+ switch (platform_get_family()) {
+ case FAMILY_1500VZE:
+ break;
+
+ case FAMILY_1500VZF:
+ usb_eye_configure(CRT_SPARE_PORT2_SHIFT_JK |
+ CRT_SPARE_PORT1_SHIFT_JK |
+ CRT_SPARE_PORT2_FAST_EDGE |
+ CRT_SPARE_PORT1_FAST_EDGE, 0);
+ break;
+
+ default:
+ usb_eye_configure(CRT_SPARE_PORT2_SHIFT_JK |
+ CRT_SPARE_PORT1_SHIFT_JK, 0);
+ break;
+ }
+
+ bcm1_usb2_ctl_value = BCM1_USB2_CTL_BISTOK |
+ BCM1_USB2_CTL_EHCI_PRT_PWR_ACTIVE_HIGH |
+ BCM1_USB2_CTL_APP_PRT_OVRCUR_IN_ACTIVE_HIGH;
+ break;
+
+ case ASIC_GAIA:
+ fs_update(0x8000, -14, 0x03, QAM_FS_DISABLE_DIVIDE_BY_3,
+ QAM_FS_DISABLE_DIGITAL_STANDBY);
+ bcm1_usb2_ctl_value = BCM1_USB2_CTL_BISTOK |
+ BCM1_USB2_CTL_EHCI_PRT_PWR_ACTIVE_HIGH |
+ BCM1_USB2_CTL_APP_PRT_OVRCUR_IN_ACTIVE_HIGH;
+ break;
+
+ default:
+ pr_err("Unknown ASIC type: %d\n", asic_type);
+ bcm1_usb2_ctl_value = 0;
+ break;
+ }
+
+ /* turn on USB power */
+ asic_write(0, usb2_strap);
+ /* Enable all OHCI interrupts */
+ asic_write(bcm1_usb2_ctl_value, usb2_control);
+ /* usb2_stbus_obc store32/load32 */
+ asic_write(USB_STBUS_OBC_STORE32_LOAD32, usb2_stbus_obc);
+ /* usb2_stbus_mess_size 2 packets */
+ asic_write(USB2_STBUS_MESS_SIZE_2, usb2_stbus_mess_size);
+ /* usb2_stbus_chunk_size 2 packets */
+ asic_write(USB2_STBUS_CHUNK_SIZE_2, usb2_stbus_chunk_size);
+ spin_unlock_irqrestore(&usb_regs_lock, flags);
+}
+
+static void platform_unconfigure_usb(void)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&usb_regs_lock, flags);
+ usb_users--;
+ if (usb_users == 0)
+ asic_write(USB2_STRAP_HFREQ_SELECT, usb2_strap);
+ spin_unlock_irqrestore(&usb_regs_lock, flags);
+}
+
+/*
+ * Set up the USB EHCI interface
+ */
+void platform_configure_usb_ehci()
+{
+ platform_configure_usb();
+}
+EXPORT_SYMBOL(platform_configure_usb_ehci);
+
+/*
+ * Set up the USB OHCI interface
+ */
+void platform_configure_usb_ohci()
+{
+ platform_configure_usb();
+}
+EXPORT_SYMBOL(platform_configure_usb_ohci);
+
+/*
+ * Shut the USB EHCI interface down
+ */
+void platform_unconfigure_usb_ehci()
+{
+ platform_unconfigure_usb();
+}
+EXPORT_SYMBOL(platform_unconfigure_usb_ehci);
+
+/*
+ * Shut the USB OHCI interface down
+ */
+void platform_unconfigure_usb_ohci()
+{
+ platform_unconfigure_usb();
+}
+EXPORT_SYMBOL(platform_unconfigure_usb_ohci);
+
+/**
+ * platform_devices_init - sets up USB device resourse.
+ */
+int __init platform_usb_devices_init(struct platform_device **ehci_dev,
+ struct platform_device **ohci_dev)
+{
+ *ehci_dev = &ehci_device;
+ ehci_resources[0].start = asic_reg_phys_addr(ehci_hcapbase);
+ ehci_resources[0].end += ehci_resources[0].start;
+
+ *ohci_dev = &ohci_device;
+ ohci_resources[0].start = asic_reg_phys_addr(ohci_hc_revision);
+ ohci_resources[0].end += ohci_resources[0].start;
+
+ return 0;
+}
diff --git a/arch/mips/powertv/powertv_setup.c b/arch/mips/powertv/powertv_setup.c
index af2cae0..3933c37 100644
--- a/arch/mips/powertv/powertv_setup.c
+++ b/arch/mips/powertv/powertv_setup.c
@@ -199,14 +199,8 @@ static int panic_handler(struct notifier_block *notifier_block,
my_regs.cp0_status = read_c0_status();
}
-#ifdef CONFIG_DIAGNOSTICS
- failure_report((char *) cause_string,
- have_die_regs ? &die_regs : &my_regs);
- have_die_regs = false;
-#else
pr_crit("I'm feeling a bit sleepy. hmmmmm... perhaps a nap would... "
"zzzz... \n");
-#endif
return NOTIFY_DONE;
}
generated by cgit v1.1 at 2024-12-27 08:40:30 +0000