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-rw-r--r--arch/sh/kernel/cpu/sh4a/Makefile2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7343.c99
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7722.c221
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7343.c253
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7366.c139
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7722.c85
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7723.c138
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7763.c21
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7780.c11
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7785.c17
10 files changed, 803 insertions, 183 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/Makefile b/arch/sh/kernel/cpu/sh4a/Makefile
index a880e79..9381ad8 100644
--- a/arch/sh/kernel/cpu/sh4a/Makefile
+++ b/arch/sh/kernel/cpu/sh4a/Makefile
@@ -21,7 +21,7 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7763) := clock-sh7763.o
clock-$(CONFIG_CPU_SUBTYPE_SH7770) := clock-sh7770.o
clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o
clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o
-clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7343.o
+clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7722.o
clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o
clock-$(CONFIG_CPU_SUBTYPE_SH7723) := clock-sh7722.o
clock-$(CONFIG_CPU_SUBTYPE_SH7366) := clock-sh7722.o
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
deleted file mode 100644
index 7adc4f1..0000000
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
+++ /dev/null
@@ -1,99 +0,0 @@
-/*
- * arch/sh/kernel/cpu/sh4a/clock-sh7343.c
- *
- * SH7343/SH7722 support for the clock framework
- *
- * Copyright (C) 2006 Paul Mundt
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/io.h>
-#include <asm/clock.h>
-#include <asm/freq.h>
-
-/*
- * SH7343/SH7722 uses a common set of multipliers and divisors, so this
- * is quite simple..
- */
-static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 };
-static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 };
-
-#define pll_calc() (((ctrl_inl(FRQCR) >> 24) & 0x1f) + 1)
-
-static void master_clk_init(struct clk *clk)
-{
- clk->parent = clk_get(NULL, "cpu_clk");
-}
-
-static void master_clk_recalc(struct clk *clk)
-{
- int idx = (ctrl_inl(FRQCR) & 0x000f);
- clk->rate *= clk->parent->rate * multipliers[idx] / divisors[idx];
-}
-
-static struct clk_ops sh7343_master_clk_ops = {
- .init = master_clk_init,
- .recalc = master_clk_recalc,
-};
-
-static void module_clk_init(struct clk *clk)
-{
- clk->parent = NULL;
- clk->rate = CONFIG_SH_PCLK_FREQ;
-}
-
-static struct clk_ops sh7343_module_clk_ops = {
- .init = module_clk_init,
-};
-
-static void bus_clk_init(struct clk *clk)
-{
- clk->parent = clk_get(NULL, "cpu_clk");
-}
-
-static void bus_clk_recalc(struct clk *clk)
-{
- int idx = (ctrl_inl(FRQCR) >> 8) & 0x000f;
- clk->rate = clk->parent->rate * multipliers[idx] / divisors[idx];
-}
-
-static struct clk_ops sh7343_bus_clk_ops = {
- .init = bus_clk_init,
- .recalc = bus_clk_recalc,
-};
-
-static void cpu_clk_init(struct clk *clk)
-{
- clk->parent = clk_get(NULL, "module_clk");
- clk->flags |= CLK_RATE_PROPAGATES;
- clk_set_rate(clk, clk_get_rate(clk));
-}
-
-static void cpu_clk_recalc(struct clk *clk)
-{
- int idx = (ctrl_inl(FRQCR) >> 20) & 0x000f;
- clk->rate = clk->parent->rate * pll_calc() *
- multipliers[idx] / divisors[idx];
-}
-
-static struct clk_ops sh7343_cpu_clk_ops = {
- .init = cpu_clk_init,
- .recalc = cpu_clk_recalc,
-};
-
-static struct clk_ops *sh7343_clk_ops[] = {
- &sh7343_master_clk_ops,
- &sh7343_module_clk_ops,
- &sh7343_bus_clk_ops,
- &sh7343_cpu_clk_ops,
-};
-
-void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
-{
- if (idx < ARRAY_SIZE(sh7343_clk_ops))
- *ops = sh7343_clk_ops[idx];
-}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
index 299138e..db91385 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
@@ -1,7 +1,7 @@
/*
* arch/sh/kernel/cpu/sh4a/clock-sh7722.c
*
- * SH7722 & SH7366 support for the clock framework
+ * SH7343, SH7722, SH7723 & SH7366 support for the clock framework
*
* Copyright (c) 2006-2007 Nomad Global Solutions Inc
* Based on code for sh7343 by Paul Mundt
@@ -14,6 +14,7 @@
#include <linux/kernel.h>
#include <linux/io.h>
#include <linux/errno.h>
+#include <linux/stringify.h>
#include <asm/clock.h>
#include <asm/freq.h>
@@ -411,40 +412,40 @@ static struct clk_ops sh7722_frqcr_clk_ops = {
* clock ops methods for SIU A/B and IrDA clock
*
*/
-static int sh7722_siu_which(struct clk *clk)
+
+#ifndef CONFIG_CPU_SUBTYPE_SH7343
+
+static int sh7722_siu_set_rate(struct clk *clk, unsigned long rate, int algo_id)
{
- if (!strcmp(clk->name, "siu_a_clk"))
- return 0;
- if (!strcmp(clk->name, "siu_b_clk"))
- return 1;
-#if defined(CONFIG_CPU_SUBTYPE_SH7722)
- if (!strcmp(clk->name, "irda_clk"))
- return 2;
-#endif
- return -EINVAL;
+ unsigned long r;
+ int div;
+
+ r = ctrl_inl(clk->arch_flags);
+ div = sh7722_find_divisors(clk->parent->rate, rate);
+ if (div < 0)
+ return div;
+ r = (r & ~0xF) | div;
+ ctrl_outl(r, clk->arch_flags);
+ return 0;
}
-static unsigned long sh7722_siu_regs[] = {
- [0] = SCLKACR,
- [1] = SCLKBCR,
-#if defined(CONFIG_CPU_SUBTYPE_SH7722)
- [2] = IrDACLKCR,
-#endif
-};
+static void sh7722_siu_recalc(struct clk *clk)
+{
+ unsigned long r;
+
+ r = ctrl_inl(clk->arch_flags);
+ clk->rate = clk->parent->rate * 2 / divisors2[r & 0xF];
+}
static int sh7722_siu_start_stop(struct clk *clk, int enable)
{
- int siu = sh7722_siu_which(clk);
unsigned long r;
- if (siu < 0)
- return siu;
- BUG_ON(siu > 2);
- r = ctrl_inl(sh7722_siu_regs[siu]);
+ r = ctrl_inl(clk->arch_flags);
if (enable)
- ctrl_outl(r & ~(1 << 8), sh7722_siu_regs[siu]);
+ ctrl_outl(r & ~(1 << 8), clk->arch_flags);
else
- ctrl_outl(r | (1 << 8), sh7722_siu_regs[siu]);
+ ctrl_outl(r | (1 << 8), clk->arch_flags);
return 0;
}
@@ -458,6 +459,15 @@ static void sh7722_siu_disable(struct clk *clk)
sh7722_siu_start_stop(clk, 0);
}
+static struct clk_ops sh7722_siu_clk_ops = {
+ .recalc = sh7722_siu_recalc,
+ .set_rate = sh7722_siu_set_rate,
+ .enable = sh7722_siu_enable,
+ .disable = sh7722_siu_disable,
+};
+
+#endif /* CONFIG_CPU_SUBTYPE_SH7343 */
+
static void sh7722_video_enable(struct clk *clk)
{
unsigned long r;
@@ -494,43 +504,6 @@ static void sh7722_video_recalc(struct clk *clk)
clk->rate = clk->parent->rate / ((r & 0x3F) + 1);
}
-static int sh7722_siu_set_rate(struct clk *clk, unsigned long rate, int algo_id)
-{
- int siu = sh7722_siu_which(clk);
- unsigned long r;
- int div;
-
- if (siu < 0)
- return siu;
- BUG_ON(siu > 2);
- r = ctrl_inl(sh7722_siu_regs[siu]);
- div = sh7722_find_divisors(clk->parent->rate, rate);
- if (div < 0)
- return div;
- r = (r & ~0xF) | div;
- ctrl_outl(r, sh7722_siu_regs[siu]);
- return 0;
-}
-
-static void sh7722_siu_recalc(struct clk *clk)
-{
- int siu = sh7722_siu_which(clk);
- unsigned long r;
-
- if (siu < 0)
- return /* siu */ ;
- BUG_ON(siu > 2);
- r = ctrl_inl(sh7722_siu_regs[siu]);
- clk->rate = clk->parent->rate * 2 / divisors2[r & 0xF];
-}
-
-static struct clk_ops sh7722_siu_clk_ops = {
- .recalc = sh7722_siu_recalc,
- .set_rate = sh7722_siu_set_rate,
- .enable = sh7722_siu_enable,
- .disable = sh7722_siu_disable,
-};
-
static struct clk_ops sh7722_video_clk_ops = {
.recalc = sh7722_video_recalc,
.set_rate = sh7722_video_set_rate,
@@ -560,6 +533,9 @@ static struct clk sh7722_sdram_clock = {
.ops = &sh7722_frqcr_clk_ops,
};
+
+#ifndef CONFIG_CPU_SUBTYPE_SH7343
+
/*
* these three clocks - SIU A, SIU B, IrDA - share the same clk_ops
* methods of clk_ops determine which register they should access by
@@ -567,36 +543,151 @@ static struct clk sh7722_sdram_clock = {
*/
static struct clk sh7722_siu_a_clock = {
.name = "siu_a_clk",
+ .arch_flags = SCLKACR,
.ops = &sh7722_siu_clk_ops,
};
static struct clk sh7722_siu_b_clock = {
.name = "siu_b_clk",
+ .arch_flags = SCLKBCR,
.ops = &sh7722_siu_clk_ops,
};
#if defined(CONFIG_CPU_SUBTYPE_SH7722)
static struct clk sh7722_irda_clock = {
.name = "irda_clk",
+ .arch_flags = IrDACLKCR,
.ops = &sh7722_siu_clk_ops,
};
#endif
+#endif /* CONFIG_CPU_SUBTYPE_SH7343 */
static struct clk sh7722_video_clock = {
.name = "video_clk",
.ops = &sh7722_video_clk_ops,
};
+static int sh7722_mstpcr_start_stop(struct clk *clk, unsigned long reg,
+ int enable)
+{
+ unsigned long bit = clk->arch_flags;
+ unsigned long r;
+
+ r = ctrl_inl(reg);
+
+ if (enable)
+ r &= ~(1 << bit);
+ else
+ r |= (1 << bit);
+
+ ctrl_outl(r, reg);
+ return 0;
+}
+
+static void sh7722_mstpcr0_enable(struct clk *clk)
+{
+ sh7722_mstpcr_start_stop(clk, MSTPCR0, 1);
+}
+
+static void sh7722_mstpcr0_disable(struct clk *clk)
+{
+ sh7722_mstpcr_start_stop(clk, MSTPCR0, 0);
+}
+
+static void sh7722_mstpcr1_enable(struct clk *clk)
+{
+ sh7722_mstpcr_start_stop(clk, MSTPCR1, 1);
+}
+
+static void sh7722_mstpcr1_disable(struct clk *clk)
+{
+ sh7722_mstpcr_start_stop(clk, MSTPCR1, 0);
+}
+
+static void sh7722_mstpcr2_enable(struct clk *clk)
+{
+ sh7722_mstpcr_start_stop(clk, MSTPCR2, 1);
+}
+
+static void sh7722_mstpcr2_disable(struct clk *clk)
+{
+ sh7722_mstpcr_start_stop(clk, MSTPCR2, 0);
+}
+
+static struct clk_ops sh7722_mstpcr0_clk_ops = {
+ .enable = sh7722_mstpcr0_enable,
+ .disable = sh7722_mstpcr0_disable,
+};
+
+static struct clk_ops sh7722_mstpcr1_clk_ops = {
+ .enable = sh7722_mstpcr1_enable,
+ .disable = sh7722_mstpcr1_disable,
+};
+
+static struct clk_ops sh7722_mstpcr2_clk_ops = {
+ .enable = sh7722_mstpcr2_enable,
+ .disable = sh7722_mstpcr2_disable,
+};
+
+#define DECLARE_MSTPCRN(regnr, bitnr, bitstr) \
+{ \
+ .name = "mstp" __stringify(regnr) bitstr, \
+ .arch_flags = bitnr, \
+ .ops = &sh7722_mstpcr ## regnr ## _clk_ops, \
+}
+
+#define DECLARE_MSTPCR(regnr) \
+ DECLARE_MSTPCRN(regnr, 31, "31"), \
+ DECLARE_MSTPCRN(regnr, 30, "30"), \
+ DECLARE_MSTPCRN(regnr, 29, "29"), \
+ DECLARE_MSTPCRN(regnr, 28, "28"), \
+ DECLARE_MSTPCRN(regnr, 27, "27"), \
+ DECLARE_MSTPCRN(regnr, 26, "26"), \
+ DECLARE_MSTPCRN(regnr, 25, "25"), \
+ DECLARE_MSTPCRN(regnr, 24, "24"), \
+ DECLARE_MSTPCRN(regnr, 23, "23"), \
+ DECLARE_MSTPCRN(regnr, 22, "22"), \
+ DECLARE_MSTPCRN(regnr, 21, "21"), \
+ DECLARE_MSTPCRN(regnr, 20, "20"), \
+ DECLARE_MSTPCRN(regnr, 19, "19"), \
+ DECLARE_MSTPCRN(regnr, 18, "18"), \
+ DECLARE_MSTPCRN(regnr, 17, "17"), \
+ DECLARE_MSTPCRN(regnr, 16, "16"), \
+ DECLARE_MSTPCRN(regnr, 15, "15"), \
+ DECLARE_MSTPCRN(regnr, 14, "14"), \
+ DECLARE_MSTPCRN(regnr, 13, "13"), \
+ DECLARE_MSTPCRN(regnr, 12, "12"), \
+ DECLARE_MSTPCRN(regnr, 11, "11"), \
+ DECLARE_MSTPCRN(regnr, 10, "10"), \
+ DECLARE_MSTPCRN(regnr, 9, "09"), \
+ DECLARE_MSTPCRN(regnr, 8, "08"), \
+ DECLARE_MSTPCRN(regnr, 7, "07"), \
+ DECLARE_MSTPCRN(regnr, 6, "06"), \
+ DECLARE_MSTPCRN(regnr, 5, "05"), \
+ DECLARE_MSTPCRN(regnr, 4, "04"), \
+ DECLARE_MSTPCRN(regnr, 3, "03"), \
+ DECLARE_MSTPCRN(regnr, 2, "02"), \
+ DECLARE_MSTPCRN(regnr, 1, "01"), \
+ DECLARE_MSTPCRN(regnr, 0, "00")
+
+static struct clk sh7722_mstpcr[] = {
+ DECLARE_MSTPCR(0),
+ DECLARE_MSTPCR(1),
+ DECLARE_MSTPCR(2),
+};
+
static struct clk *sh7722_clocks[] = {
&sh7722_umem_clock,
&sh7722_sh_clock,
&sh7722_peripheral_clock,
&sh7722_sdram_clock,
+#ifndef CONFIG_CPU_SUBTYPE_SH7343
&sh7722_siu_a_clock,
&sh7722_siu_b_clock,
#if defined(CONFIG_CPU_SUBTYPE_SH7722)
&sh7722_irda_clock,
#endif
+#endif
&sh7722_video_clock,
};
@@ -629,5 +720,11 @@ int __init arch_clk_init(void)
clk_register(sh7722_clocks[i]);
}
clk_put(master);
+
+ for (i = 0; i < ARRAY_SIZE(sh7722_mstpcr); i++) {
+ pr_debug( "Registering mstpcr '%s'\n", sh7722_mstpcr[i].name);
+ clk_register(&sh7722_mstpcr[i]);
+ }
+
return 0;
}
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
index 6d4f50c..78881b4 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
@@ -11,6 +11,104 @@
#include <linux/init.h>
#include <linux/serial.h>
#include <linux/serial_sci.h>
+#include <linux/uio_driver.h>
+#include <asm/clock.h>
+
+static struct resource iic0_resources[] = {
+ [0] = {
+ .name = "IIC0",
+ .start = 0x04470000,
+ .end = 0x04470017,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = 96,
+ .end = 99,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device iic0_device = {
+ .name = "i2c-sh_mobile",
+ .num_resources = ARRAY_SIZE(iic0_resources),
+ .resource = iic0_resources,
+};
+
+static struct resource iic1_resources[] = {
+ [0] = {
+ .name = "IIC1",
+ .start = 0x04750000,
+ .end = 0x04750017,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = 44,
+ .end = 47,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device iic1_device = {
+ .name = "i2c-sh_mobile",
+ .num_resources = ARRAY_SIZE(iic1_resources),
+ .resource = iic1_resources,
+};
+
+static struct uio_info vpu_platform_data = {
+ .name = "VPU4",
+ .version = "0",
+ .irq = 60,
+};
+
+static struct resource vpu_resources[] = {
+ [0] = {
+ .name = "VPU",
+ .start = 0xfe900000,
+ .end = 0xfe9022eb,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ /* place holder for contiguous memory */
+ },
+};
+
+static struct platform_device vpu_device = {
+ .name = "uio_pdrv_genirq",
+ .id = 0,
+ .dev = {
+ .platform_data = &vpu_platform_data,
+ },
+ .resource = vpu_resources,
+ .num_resources = ARRAY_SIZE(vpu_resources),
+};
+
+static struct uio_info veu_platform_data = {
+ .name = "VEU",
+ .version = "0",
+ .irq = 54,
+};
+
+static struct resource veu_resources[] = {
+ [0] = {
+ .name = "VEU",
+ .start = 0xfe920000,
+ .end = 0xfe9200b7,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ /* place holder for contiguous memory */
+ },
+};
+
+static struct platform_device veu_device = {
+ .name = "uio_pdrv_genirq",
+ .id = 1,
+ .dev = {
+ .platform_data = &veu_platform_data,
+ },
+ .resource = veu_resources,
+ .num_resources = ARRAY_SIZE(veu_resources),
+};
static struct plat_sci_port sci_platform_data[] = {
{
@@ -32,16 +130,171 @@ static struct platform_device sci_device = {
};
static struct platform_device *sh7343_devices[] __initdata = {
+ &iic0_device,
+ &iic1_device,
&sci_device,
+ &vpu_device,
+ &veu_device,
};
static int __init sh7343_devices_setup(void)
{
+ clk_always_enable("mstp031"); /* TLB */
+ clk_always_enable("mstp030"); /* IC */
+ clk_always_enable("mstp029"); /* OC */
+ clk_always_enable("mstp028"); /* URAM */
+ clk_always_enable("mstp026"); /* XYMEM */
+ clk_always_enable("mstp023"); /* INTC3 */
+ clk_always_enable("mstp022"); /* INTC */
+ clk_always_enable("mstp020"); /* SuperHyway */
+ clk_always_enable("mstp109"); /* I2C0 */
+ clk_always_enable("mstp108"); /* I2C1 */
+ clk_always_enable("mstp202"); /* VEU */
+ clk_always_enable("mstp201"); /* VPU */
+
+ platform_resource_setup_memory(&vpu_device, "vpu", 1 << 20);
+ platform_resource_setup_memory(&veu_device, "veu", 2 << 20);
+
return platform_add_devices(sh7343_devices,
ARRAY_SIZE(sh7343_devices));
}
__initcall(sh7343_devices_setup);
+enum {
+ UNUSED = 0,
+
+ /* interrupt sources */
+ IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
+ DMAC0, DMAC1, DMAC2, DMAC3,
+ VIO_CEUI, VIO_BEUI, VIO_VEUI, VOU,
+ MFI, VPU, TPU, Z3D4, USBI0, USBI1,
+ MMC_ERR, MMC_TRAN, MMC_FSTAT, MMC_FRDY,
+ DMAC4, DMAC5, DMAC_DADERR,
+ KEYSC,
+ SCIF, SCIF1, SCIF2, SCIF3, SCIF4,
+ SIOF0, SIOF1, SIO,
+ FLCTL_FLSTEI, FLCTL_FLENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I,
+ I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI,
+ I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI,
+ SIM_TEI, SIM_TXI, SIM_RXI, SIM_ERI,
+ IRDA,
+ SDHI0, SDHI1, SDHI2, SDHI3,
+ CMT, TSIF, SIU,
+ TMU0, TMU1, TMU2,
+ JPU, LCDC,
+
+ /* interrupt groups */
+
+ DMAC0123, VIOVOU, MMC, DMAC45, FLCTL, I2C0, I2C1, SIM, SDHI, USB,
+};
+
+static struct intc_vect vectors[] __initdata = {
+ INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
+ INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
+ INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
+ INTC_VECT(IRQ6, 0x6c0), INTC_VECT(IRQ7, 0x6e0),
+ INTC_VECT(I2C1_ALI, 0x780), INTC_VECT(I2C1_TACKI, 0x7a0),
+ INTC_VECT(I2C1_WAITI, 0x7c0), INTC_VECT(I2C1_DTEI, 0x7e0),
+ INTC_VECT(DMAC0, 0x800), INTC_VECT(DMAC1, 0x820),
+ INTC_VECT(DMAC2, 0x840), INTC_VECT(DMAC3, 0x860),
+ INTC_VECT(VIO_CEUI, 0x880), INTC_VECT(VIO_BEUI, 0x8a0),
+ INTC_VECT(VIO_VEUI, 0x8c0), INTC_VECT(VOU, 0x8e0),
+ INTC_VECT(MFI, 0x900), INTC_VECT(VPU, 0x980),
+ INTC_VECT(TPU, 0x9a0), INTC_VECT(Z3D4, 0x9e0),
+ INTC_VECT(USBI0, 0xa20), INTC_VECT(USBI1, 0xa40),
+ INTC_VECT(MMC_ERR, 0xb00), INTC_VECT(MMC_TRAN, 0xb20),
+ INTC_VECT(MMC_FSTAT, 0xb40), INTC_VECT(MMC_FRDY, 0xb60),
+ INTC_VECT(DMAC4, 0xb80), INTC_VECT(DMAC5, 0xba0),
+ INTC_VECT(DMAC_DADERR, 0xbc0), INTC_VECT(KEYSC, 0xbe0),
+ INTC_VECT(SCIF, 0xc00), INTC_VECT(SCIF1, 0xc20),
+ INTC_VECT(SCIF2, 0xc40), INTC_VECT(SCIF3, 0xc60),
+ INTC_VECT(SIOF0, 0xc80), INTC_VECT(SIOF1, 0xca0),
+ INTC_VECT(SIO, 0xd00),
+ INTC_VECT(FLCTL_FLSTEI, 0xd80), INTC_VECT(FLCTL_FLENDI, 0xda0),
+ INTC_VECT(FLCTL_FLTREQ0I, 0xdc0), INTC_VECT(FLCTL_FLTREQ1I, 0xde0),
+ INTC_VECT(I2C0_ALI, 0xe00), INTC_VECT(I2C0_TACKI, 0xe20),
+ INTC_VECT(I2C0_WAITI, 0xe40), INTC_VECT(I2C0_DTEI, 0xe60),
+ INTC_VECT(SDHI0, 0xe80), INTC_VECT(SDHI1, 0xea0),
+ INTC_VECT(SDHI2, 0xec0), INTC_VECT(SDHI3, 0xee0),
+ INTC_VECT(CMT, 0xf00), INTC_VECT(TSIF, 0xf20),
+ INTC_VECT(SIU, 0xf80),
+ INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
+ INTC_VECT(TMU2, 0x440),
+ INTC_VECT(JPU, 0x560), INTC_VECT(LCDC, 0x580),
+};
+
+static struct intc_group groups[] __initdata = {
+ INTC_GROUP(DMAC0123, DMAC0, DMAC1, DMAC2, DMAC3),
+ INTC_GROUP(VIOVOU, VIO_CEUI, VIO_BEUI, VIO_VEUI, VOU),
+ INTC_GROUP(MMC, MMC_FRDY, MMC_FSTAT, MMC_TRAN, MMC_ERR),
+ INTC_GROUP(DMAC45, DMAC4, DMAC5, DMAC_DADERR),
+ INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLENDI,
+ FLCTL_FLTREQ0I, FLCTL_FLTREQ1I),
+ INTC_GROUP(I2C0, I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI),
+ INTC_GROUP(I2C1, I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI),
+ INTC_GROUP(SIM, SIM_TEI, SIM_TXI, SIM_RXI, SIM_ERI),
+ INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2, SDHI3),
+ INTC_GROUP(USB, USBI0, USBI1),
+};
+
+static struct intc_mask_reg mask_registers[] __initdata = {
+ { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */
+ { VOU, VIO_VEUI, VIO_BEUI, VIO_CEUI, DMAC3, DMAC2, DMAC1, DMAC0 } },
+ { 0xa4080088, 0xa40800c8, 8, /* IMR2 / IMCR2 */
+ { 0, 0, 0, VPU, 0, 0, 0, MFI } },
+ { 0xa408008c, 0xa40800cc, 8, /* IMR3 / IMCR3 */
+ { SIM_TEI, SIM_TXI, SIM_RXI, SIM_ERI, 0, 0, 0, IRDA } },
+ { 0xa4080090, 0xa40800d0, 8, /* IMR4 / IMCR4 */
+ { 0, TMU2, TMU1, TMU0, JPU, 0, 0, LCDC } },
+ { 0xa4080094, 0xa40800d4, 8, /* IMR5 / IMCR5 */
+ { KEYSC, DMAC_DADERR, DMAC5, DMAC4, SCIF3, SCIF2, SCIF1, SCIF } },
+ { 0xa4080098, 0xa40800d8, 8, /* IMR6 / IMCR6 */
+ { 0, 0, 0, SIO, Z3D4, 0, SIOF1, SIOF0 } },
+ { 0xa408009c, 0xa40800dc, 8, /* IMR7 / IMCR7 */
+ { I2C0_DTEI, I2C0_WAITI, I2C0_TACKI, I2C0_ALI,
+ FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLENDI, FLCTL_FLSTEI } },
+ { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */
+ { SDHI3, SDHI2, SDHI1, SDHI0, 0, 0, 0, SIU } },
+ { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */
+ { 0, 0, 0, CMT, 0, USBI1, USBI0 } },
+ { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */
+ { MMC_FRDY, MMC_FSTAT, MMC_TRAN, MMC_ERR } },
+ { 0xa40800ac, 0xa40800ec, 8, /* IMR11 / IMCR11 */
+ { I2C1_DTEI, I2C1_WAITI, I2C1_TACKI, I2C1_ALI, TPU, 0, 0, TSIF } },
+ { 0xa4140044, 0xa4140064, 8, /* INTMSK00 / INTMSKCLR00 */
+ { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
+};
+
+static struct intc_prio_reg prio_registers[] __initdata = {
+ { 0xa4080000, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2 } },
+ { 0xa4080004, 0, 16, 4, /* IPRB */ { JPU, LCDC, SIM } },
+ { 0xa4080010, 0, 16, 4, /* IPRE */ { DMAC0123, VIOVOU, MFI, VPU } },
+ { 0xa4080014, 0, 16, 4, /* IPRF */ { KEYSC, DMAC45, USB, CMT } },
+ { 0xa4080018, 0, 16, 4, /* IPRG */ { SCIF, SCIF1, SCIF2, SCIF3 } },
+ { 0xa408001c, 0, 16, 4, /* IPRH */ { SIOF0, SIOF1, FLCTL, I2C0 } },
+ { 0xa4080020, 0, 16, 4, /* IPRI */ { SIO, 0, TSIF, I2C1 } },
+ { 0xa4080024, 0, 16, 4, /* IPRJ */ { Z3D4, 0, SIU } },
+ { 0xa4080028, 0, 16, 4, /* IPRK */ { 0, MMC, 0, SDHI } },
+ { 0xa408002c, 0, 16, 4, /* IPRL */ { 0, 0, TPU } },
+ { 0xa4140010, 0, 32, 4, /* INTPRI00 */
+ { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
+};
+
+static struct intc_sense_reg sense_registers[] __initdata = {
+ { 0xa414001c, 16, 2, /* ICR1 */
+ { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
+};
+
+static struct intc_mask_reg ack_registers[] __initdata = {
+ { 0xa4140024, 0, 8, /* INTREQ00 */
+ { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
+};
+
+static DECLARE_INTC_DESC_ACK(intc_desc, "sh7343", vectors, groups,
+ mask_registers, prio_registers, sense_registers,
+ ack_registers);
+
void __init plat_irq_setup(void)
{
+ register_intc_controller(&intc_desc);
}
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
index f26b5cd..6851dba 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
@@ -13,6 +13,112 @@
#include <linux/init.h>
#include <linux/serial.h>
#include <linux/serial_sci.h>
+#include <linux/uio_driver.h>
+#include <asm/clock.h>
+
+static struct resource iic_resources[] = {
+ [0] = {
+ .name = "IIC",
+ .start = 0x04470000,
+ .end = 0x04470017,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = 96,
+ .end = 99,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device iic_device = {
+ .name = "i2c-sh_mobile",
+ .num_resources = ARRAY_SIZE(iic_resources),
+ .resource = iic_resources,
+};
+
+static struct uio_info vpu_platform_data = {
+ .name = "VPU5",
+ .version = "0",
+ .irq = 60,
+};
+
+static struct resource vpu_resources[] = {
+ [0] = {
+ .name = "VPU",
+ .start = 0xfe900000,
+ .end = 0xfe902807,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ /* place holder for contiguous memory */
+ },
+};
+
+static struct platform_device vpu_device = {
+ .name = "uio_pdrv_genirq",
+ .id = 0,
+ .dev = {
+ .platform_data = &vpu_platform_data,
+ },
+ .resource = vpu_resources,
+ .num_resources = ARRAY_SIZE(vpu_resources),
+};
+
+static struct uio_info veu0_platform_data = {
+ .name = "VEU",
+ .version = "0",
+ .irq = 54,
+};
+
+static struct resource veu0_resources[] = {
+ [0] = {
+ .name = "VEU(1)",
+ .start = 0xfe920000,
+ .end = 0xfe9200b7,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ /* place holder for contiguous memory */
+ },
+};
+
+static struct platform_device veu0_device = {
+ .name = "uio_pdrv_genirq",
+ .id = 1,
+ .dev = {
+ .platform_data = &veu0_platform_data,
+ },
+ .resource = veu0_resources,
+ .num_resources = ARRAY_SIZE(veu0_resources),
+};
+
+static struct uio_info veu1_platform_data = {
+ .name = "VEU",
+ .version = "0",
+ .irq = 27,
+};
+
+static struct resource veu1_resources[] = {
+ [0] = {
+ .name = "VEU(2)",
+ .start = 0xfe924000,
+ .end = 0xfe9240b7,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ /* place holder for contiguous memory */
+ },
+};
+
+static struct platform_device veu1_device = {
+ .name = "uio_pdrv_genirq",
+ .id = 2,
+ .dev = {
+ .platform_data = &veu1_platform_data,
+ },
+ .resource = veu1_resources,
+ .num_resources = ARRAY_SIZE(veu1_resources),
+};
static struct plat_sci_port sci_platform_data[] = {
{
@@ -34,11 +140,32 @@ static struct platform_device sci_device = {
};
static struct platform_device *sh7366_devices[] __initdata = {
+ &iic_device,
&sci_device,
+ &vpu_device,
+ &veu0_device,
+ &veu1_device,
};
static int __init sh7366_devices_setup(void)
{
+ clk_always_enable("mstp031"); /* TLB */
+ clk_always_enable("mstp030"); /* IC */
+ clk_always_enable("mstp029"); /* OC */
+ clk_always_enable("mstp028"); /* RSMEM */
+ clk_always_enable("mstp026"); /* XYMEM */
+ clk_always_enable("mstp023"); /* INTC3 */
+ clk_always_enable("mstp022"); /* INTC */
+ clk_always_enable("mstp020"); /* SuperHyway */
+ clk_always_enable("mstp109"); /* I2C */
+ clk_always_enable("mstp207"); /* VEU-2 */
+ clk_always_enable("mstp202"); /* VEU-1 */
+ clk_always_enable("mstp201"); /* VPU */
+
+ platform_resource_setup_memory(&vpu_device, "vpu", 2 << 20);
+ platform_resource_setup_memory(&veu0_device, "veu0", 2 << 20);
+ platform_resource_setup_memory(&veu1_device, "veu1", 2 << 20);
+
return platform_add_devices(sh7366_devices,
ARRAY_SIZE(sh7366_devices));
}
@@ -97,7 +224,7 @@ static struct intc_vect vectors[] __initdata = {
INTC_VECT(SIU, 0xf80),
INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
INTC_VECT(TMU2, 0x440),
- INTC_VECT(VEU2, 0x580), INTC_VECT(LCDC, 0x580),
+ INTC_VECT(VEU2, 0x560), INTC_VECT(LCDC, 0x580),
};
static struct intc_group groups[] __initdata = {
@@ -163,8 +290,14 @@ static struct intc_sense_reg sense_registers[] __initdata = {
{ IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
};
-static DECLARE_INTC_DESC(intc_desc, "sh7366", vectors, groups,
- mask_registers, prio_registers, sense_registers);
+static struct intc_mask_reg ack_registers[] __initdata = {
+ { 0xa4140024, 0, 8, /* INTREQ00 */
+ { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
+};
+
+static DECLARE_INTC_DESC_ACK(intc_desc, "sh7366", vectors, groups,
+ mask_registers, prio_registers, sense_registers,
+ ack_registers);
void __init plat_irq_setup(void)
{
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index 62ebccf..de1ede9 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -12,6 +12,8 @@
#include <linux/serial.h>
#include <linux/serial_sci.h>
#include <linux/mm.h>
+#include <linux/uio_driver.h>
+#include <asm/clock.h>
#include <asm/mmzone.h>
static struct resource usbf_resources[] = {
@@ -59,6 +61,62 @@ static struct platform_device iic_device = {
.resource = iic_resources,
};
+static struct uio_info vpu_platform_data = {
+ .name = "VPU4",
+ .version = "0",
+ .irq = 60,
+};
+
+static struct resource vpu_resources[] = {
+ [0] = {
+ .name = "VPU",
+ .start = 0xfe900000,
+ .end = 0xfe9022eb,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ /* place holder for contiguous memory */
+ },
+};
+
+static struct platform_device vpu_device = {
+ .name = "uio_pdrv_genirq",
+ .id = 0,
+ .dev = {
+ .platform_data = &vpu_platform_data,
+ },
+ .resource = vpu_resources,
+ .num_resources = ARRAY_SIZE(vpu_resources),
+};
+
+static struct uio_info veu_platform_data = {
+ .name = "VEU",
+ .version = "0",
+ .irq = 54,
+};
+
+static struct resource veu_resources[] = {
+ [0] = {
+ .name = "VEU",
+ .start = 0xfe920000,
+ .end = 0xfe9200b7,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ /* place holder for contiguous memory */
+ },
+};
+
+static struct platform_device veu_device = {
+ .name = "uio_pdrv_genirq",
+ .id = 1,
+ .dev = {
+ .platform_data = &veu_platform_data,
+ },
+ .resource = veu_resources,
+ .num_resources = ARRAY_SIZE(veu_resources),
+};
+
static struct plat_sci_port sci_platform_data[] = {
{
.mapbase = 0xffe00000,
@@ -95,10 +153,27 @@ static struct platform_device *sh7722_devices[] __initdata = {
&usbf_device,
&iic_device,
&sci_device,
+ &vpu_device,
+ &veu_device,
};
static int __init sh7722_devices_setup(void)
{
+ clk_always_enable("mstp031"); /* TLB */
+ clk_always_enable("mstp030"); /* IC */
+ clk_always_enable("mstp029"); /* OC */
+ clk_always_enable("mstp028"); /* URAM */
+ clk_always_enable("mstp026"); /* XYMEM */
+ clk_always_enable("mstp022"); /* INTC */
+ clk_always_enable("mstp020"); /* SuperHyway */
+ clk_always_enable("mstp109"); /* I2C */
+ clk_always_enable("mstp211"); /* USB */
+ clk_always_enable("mstp202"); /* VEU */
+ clk_always_enable("mstp201"); /* VPU */
+
+ platform_resource_setup_memory(&vpu_device, "vpu", 1 << 20);
+ platform_resource_setup_memory(&veu_device, "veu", 2 << 20);
+
return platform_add_devices(sh7722_devices,
ARRAY_SIZE(sh7722_devices));
}
@@ -229,8 +304,14 @@ static struct intc_sense_reg sense_registers[] __initdata = {
{ IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
};
-static DECLARE_INTC_DESC(intc_desc, "sh7722", vectors, groups,
- mask_registers, prio_registers, sense_registers);
+static struct intc_mask_reg ack_registers[] __initdata = {
+ { 0xa4140024, 0, 8, /* INTREQ00 */
+ { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
+};
+
+static DECLARE_INTC_DESC_ACK(intc_desc, "sh7722", vectors, groups,
+ mask_registers, prio_registers, sense_registers,
+ ack_registers);
void __init plat_irq_setup(void)
{
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
index a0470f2..cd6baff 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
@@ -12,8 +12,94 @@
#include <linux/serial.h>
#include <linux/mm.h>
#include <linux/serial_sci.h>
+#include <linux/uio_driver.h>
+#include <asm/clock.h>
#include <asm/mmzone.h>
+static struct uio_info vpu_platform_data = {
+ .name = "VPU5",
+ .version = "0",
+ .irq = 60,
+};
+
+static struct resource vpu_resources[] = {
+ [0] = {
+ .name = "VPU",
+ .start = 0xfe900000,
+ .end = 0xfe902807,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ /* place holder for contiguous memory */
+ },
+};
+
+static struct platform_device vpu_device = {
+ .name = "uio_pdrv_genirq",
+ .id = 0,
+ .dev = {
+ .platform_data = &vpu_platform_data,
+ },
+ .resource = vpu_resources,
+ .num_resources = ARRAY_SIZE(vpu_resources),
+};
+
+static struct uio_info veu0_platform_data = {
+ .name = "VEU",
+ .version = "0",
+ .irq = 54,
+};
+
+static struct resource veu0_resources[] = {
+ [0] = {
+ .name = "VEU2H0",
+ .start = 0xfe920000,
+ .end = 0xfe92027b,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ /* place holder for contiguous memory */
+ },
+};
+
+static struct platform_device veu0_device = {
+ .name = "uio_pdrv_genirq",
+ .id = 1,
+ .dev = {
+ .platform_data = &veu0_platform_data,
+ },
+ .resource = veu0_resources,
+ .num_resources = ARRAY_SIZE(veu0_resources),
+};
+
+static struct uio_info veu1_platform_data = {
+ .name = "VEU",
+ .version = "0",
+ .irq = 27,
+};
+
+static struct resource veu1_resources[] = {
+ [0] = {
+ .name = "VEU2H1",
+ .start = 0xfe924000,
+ .end = 0xfe92427b,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ /* place holder for contiguous memory */
+ },
+};
+
+static struct platform_device veu1_device = {
+ .name = "uio_pdrv_genirq",
+ .id = 2,
+ .dev = {
+ .platform_data = &veu1_platform_data,
+ },
+ .resource = veu1_resources,
+ .num_resources = ARRAY_SIZE(veu1_resources),
+};
+
static struct plat_sci_port sci_platform_data[] = {
{
.mapbase = 0xffe00000,
@@ -113,14 +199,56 @@ static struct platform_device sh7723_usb_host_device = {
.resource = sh7723_usb_host_resources,
};
+static struct resource iic_resources[] = {
+ [0] = {
+ .name = "IIC",
+ .start = 0x04470000,
+ .end = 0x04470017,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = 96,
+ .end = 99,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device iic_device = {
+ .name = "i2c-sh_mobile",
+ .num_resources = ARRAY_SIZE(iic_resources),
+ .resource = iic_resources,
+};
+
static struct platform_device *sh7723_devices[] __initdata = {
&sci_device,
&rtc_device,
+ &iic_device,
&sh7723_usb_host_device,
+ &vpu_device,
+ &veu0_device,
+ &veu1_device,
};
static int __init sh7723_devices_setup(void)
{
+ clk_always_enable("mstp031"); /* TLB */
+ clk_always_enable("mstp030"); /* IC */
+ clk_always_enable("mstp029"); /* OC */
+ clk_always_enable("mstp024"); /* FPU */
+ clk_always_enable("mstp022"); /* INTC */
+ clk_always_enable("mstp020"); /* SuperHyway */
+ clk_always_enable("mstp000"); /* MERAM */
+ clk_always_enable("mstp109"); /* I2C */
+ clk_always_enable("mstp108"); /* RTC */
+ clk_always_enable("mstp211"); /* USB */
+ clk_always_enable("mstp206"); /* VEU2H1 */
+ clk_always_enable("mstp202"); /* VEU2H0 */
+ clk_always_enable("mstp201"); /* VPU */
+
+ platform_resource_setup_memory(&vpu_device, "vpu", 2 << 20);
+ platform_resource_setup_memory(&veu0_device, "veu0", 2 << 20);
+ platform_resource_setup_memory(&veu1_device, "veu1", 2 << 20);
+
return platform_add_devices(sh7723_devices,
ARRAY_SIZE(sh7723_devices));
}
@@ -326,8 +454,14 @@ static struct intc_sense_reg sense_registers[] __initdata = {
{ IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
};
-static DECLARE_INTC_DESC(intc_desc, "sh7723", vectors, groups,
- mask_registers, prio_registers, sense_registers);
+static struct intc_mask_reg ack_registers[] __initdata = {
+ { 0xa4140024, 0, 8, /* INTREQ00 */
+ { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
+};
+
+static DECLARE_INTC_DESC_ACK(intc_desc, "sh7723", vectors, groups,
+ mask_registers, prio_registers, sense_registers,
+ ack_registers);
void __init plat_irq_setup(void)
{
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
index f189a55..3c5b629 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
@@ -3,6 +3,7 @@
*
* Copyright (C) 2006 Paul Mundt
* Copyright (C) 2007 Yoshihiro Shimoda
+ * Copyright (C) 2008 Nobuhiro Iwamatsu
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@@ -56,6 +57,11 @@ static struct plat_sci_port sci_platform_data[] = {
.type = PORT_SCIF,
.irqs = { 76, 77, 79, 78 },
}, {
+ .mapbase = 0xffe10000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .type = PORT_SCIF,
+ .irqs = { 104, 105, 107, 106 },
+ }, {
.flags = 0,
}
};
@@ -208,8 +214,8 @@ static struct intc_vect vectors[] __initdata = {
INTC_VECT(TMU5, 0xe40), INTC_VECT(ADC, 0xe60),
INTC_VECT(SSI0, 0xe80), INTC_VECT(SSI1, 0xea0),
INTC_VECT(SSI2, 0xec0), INTC_VECT(SSI3, 0xee0),
- INTC_VECT(SCIF1_ERI, 0xf00), INTC_VECT(SCIF1_RXI, 0xf20),
- INTC_VECT(SCIF1_BRI, 0xf40), INTC_VECT(SCIF1_TXI, 0xf60),
+ INTC_VECT(SCIF2_ERI, 0xf00), INTC_VECT(SCIF2_RXI, 0xf20),
+ INTC_VECT(SCIF2_BRI, 0xf40), INTC_VECT(SCIF2_TXI, 0xf60),
INTC_VECT(GPIO_CH0, 0xf80), INTC_VECT(GPIO_CH1, 0xfa0),
INTC_VECT(GPIO_CH2, 0xfc0), INTC_VECT(GPIO_CH3, 0xfe0),
};
@@ -290,9 +296,14 @@ static struct intc_sense_reg irq_sense_registers[] __initdata = {
IRQ4, IRQ5, IRQ6, IRQ7 } },
};
-static DECLARE_INTC_DESC(intc_irq_desc, "sh7763-irq", irq_vectors,
- NULL, irq_mask_registers, irq_prio_registers,
- irq_sense_registers);
+static struct intc_mask_reg irq_ack_registers[] __initdata = {
+ { 0xffd00024, 0, 32, /* INTREQ */
+ { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
+};
+
+static DECLARE_INTC_DESC_ACK(intc_irq_desc, "sh7763-irq", irq_vectors,
+ NULL, irq_mask_registers, irq_prio_registers,
+ irq_sense_registers, irq_ack_registers);
/* External interrupt pins in IRL mode */
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
index 18dbbe2..fb8200c 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
@@ -217,9 +217,14 @@ static struct intc_sense_reg irq_sense_registers[] __initdata = {
IRQ4, IRQ5, IRQ6, IRQ7 } },
};
-static DECLARE_INTC_DESC(intc_irq_desc, "sh7780-irq", irq_vectors,
- NULL, irq_mask_registers, irq_prio_registers,
- irq_sense_registers);
+static struct intc_mask_reg irq_ack_registers[] __initdata = {
+ { 0xffd00024, 0, 32, /* INTREQ */
+ { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
+};
+
+static DECLARE_INTC_DESC_ACK(intc_irq_desc, "sh7780-irq", irq_vectors,
+ NULL, irq_mask_registers, irq_prio_registers,
+ irq_sense_registers, irq_ack_registers);
/* External interrupt pins in IRL mode */
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
index 621e732..30baa63 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
@@ -238,13 +238,18 @@ static struct intc_sense_reg sense_registers[] __initdata = {
IRQ4, IRQ5, IRQ6, IRQ7 } },
};
-static DECLARE_INTC_DESC(intc_desc_irq0123, "sh7785-irq0123", vectors_irq0123,
- NULL, mask_registers, prio_registers,
- sense_registers);
+static struct intc_mask_reg ack_registers[] __initdata = {
+ { 0xffd00024, 0, 32, /* INTREQ */
+ { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
+};
+
+static DECLARE_INTC_DESC_ACK(intc_desc_irq0123, "sh7785-irq0123",
+ vectors_irq0123, NULL, mask_registers,
+ prio_registers, sense_registers, ack_registers);
-static DECLARE_INTC_DESC(intc_desc_irq4567, "sh7785-irq4567", vectors_irq4567,
- NULL, mask_registers, prio_registers,
- sense_registers);
+static DECLARE_INTC_DESC_ACK(intc_desc_irq4567, "sh7785-irq4567",
+ vectors_irq4567, NULL, mask_registers,
+ prio_registers, sense_registers, ack_registers);
/* External interrupt pins in IRL mode */
generated by cgit v1.1 at 2024-12-27 20:56:55 +0000