diff options
Diffstat (limited to 'drivers/gpu/pvr/sgx/sgxinit.c')
| -rw-r--r-- | drivers/gpu/pvr/sgx/sgxinit.c | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/drivers/gpu/pvr/sgx/sgxinit.c b/drivers/gpu/pvr/sgx/sgxinit.c index 89779e4..846035a 100644 --- a/drivers/gpu/pvr/sgx/sgxinit.c +++ b/drivers/gpu/pvr/sgx/sgxinit.c @@ -1092,27 +1092,27 @@ IMG_VOID SGXDumpDebugInfo (PVRSRV_SGXDEV_INFO *psDevInfo, SGXDumpDebugReg(psDevInfo, ui32CoreNum, "EUR_CR_PDS_PC_BASE: ", EUR_CR_PDS_PC_BASE); #endif } - } #if !defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS) && !defined(FIX_HW_BRN_31620) - { - IMG_UINT32 ui32RegVal; - IMG_UINT32 ui32PDDevPAddr; + { + IMG_UINT32 ui32RegVal; + IMG_UINT32 ui32PDDevPAddr; - + - ui32RegVal = OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_INT_STAT); - if (ui32RegVal & EUR_CR_BIF_INT_STAT_PF_N_RW_MASK) - { - ui32RegVal = OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_FAULT); - ui32RegVal &= EUR_CR_BIF_FAULT_ADDR_MASK; - ui32PDDevPAddr = OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_DIR_LIST_BASE0); - ui32PDDevPAddr &= EUR_CR_BIF_DIR_LIST_BASE0_ADDR_MASK; - MMU_CheckFaultAddr(psDevInfo, ui32PDDevPAddr, ui32RegVal); + ui32RegVal = OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_INT_STAT); + if (ui32RegVal & EUR_CR_BIF_INT_STAT_PF_N_RW_MASK) + { + ui32RegVal = OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_FAULT); + ui32RegVal &= EUR_CR_BIF_FAULT_ADDR_MASK; + ui32PDDevPAddr = OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_DIR_LIST_BASE0); + ui32PDDevPAddr &= EUR_CR_BIF_DIR_LIST_BASE0_ADDR_MASK; + MMU_CheckFaultAddr(psDevInfo, ui32PDDevPAddr, ui32RegVal); + } } +#endif } -#endif |