diff options
Diffstat (limited to 'drivers/gpu/pvr/sgx_bridge.h')
| -rw-r--r-- | drivers/gpu/pvr/sgx_bridge.h | 70 |
1 files changed, 46 insertions, 24 deletions
diff --git a/drivers/gpu/pvr/sgx_bridge.h b/drivers/gpu/pvr/sgx_bridge.h index 204189c..ec630a5 100644 --- a/drivers/gpu/pvr/sgx_bridge.h +++ b/drivers/gpu/pvr/sgx_bridge.h @@ -50,8 +50,6 @@ extern "C" { #define PVRSRV_BRIDGE_SGX_2DQUERYBLTSCOMPLETE PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+9) -#define PVRSRV_BRIDGE_SGX_GETMMUPDADDR PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+10) - #if defined(TRANSFER_QUEUE) #define PVRSRV_BRIDGE_SGX_SUBMITTRANSFER PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+13) #endif @@ -75,20 +73,22 @@ extern "C" { #define PVRSRV_BRIDGE_SGX_SCHEDULE_PROCESS_QUEUES PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+28) -#define PVRSRV_BRIDGE_SGX_READ_HWPERF_CB PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+30) +#define PVRSRV_BRIDGE_SGX_READ_HWPERF_CB PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+29) +#define PVRSRV_BRIDGE_SGX_SET_RENDER_CONTEXT_PRIORITY PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+30) +#define PVRSRV_BRIDGE_SGX_SET_TRANSFER_CONTEXT_PRIORITY PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+31) #if defined(PDUMP) -#define PVRSRV_BRIDGE_SGX_PDUMP_BUFFER_ARRAY PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+31) -#define PVRSRV_BRIDGE_SGX_PDUMP_3D_SIGNATURE_REGISTERS PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+32) -#define PVRSRV_BRIDGE_SGX_PDUMP_COUNTER_REGISTERS PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+33) -#define PVRSRV_BRIDGE_SGX_PDUMP_TA_SIGNATURE_REGISTERS PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+34) -#define PVRSRV_BRIDGE_SGX_PDUMP_HWPERFCB PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+35) -#define PVRSRV_BRIDGE_SGX_PDUMP_SAVEMEM PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+36) +#define PVRSRV_BRIDGE_SGX_PDUMP_BUFFER_ARRAY PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+32) +#define PVRSRV_BRIDGE_SGX_PDUMP_3D_SIGNATURE_REGISTERS PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+33) +#define PVRSRV_BRIDGE_SGX_PDUMP_COUNTER_REGISTERS PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+34) +#define PVRSRV_BRIDGE_SGX_PDUMP_TA_SIGNATURE_REGISTERS PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+35) +#define PVRSRV_BRIDGE_SGX_PDUMP_HWPERFCB PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+36) +#define PVRSRV_BRIDGE_SGX_PDUMP_SAVEMEM PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+37) #endif -#define PVRSRV_BRIDGE_LAST_SGX_CMD (PVRSRV_BRIDGE_SGX_CMD_BASE+36) +#define PVRSRV_BRIDGE_LAST_SGX_CMD (PVRSRV_BRIDGE_SGX_CMD_BASE+37) typedef struct PVRSRV_BRIDGE_IN_GETPHYSPAGEADDR @@ -107,24 +107,34 @@ typedef struct PVRSRV_BRIDGE_OUT_GETPHYSPAGEADDR }PVRSRV_BRIDGE_OUT_GETPHYSPAGEADDR; -typedef struct PVRSRV_BRIDGE_IN_SGX_GETMMU_PDADDR_TAG +typedef struct PVRSRV_BRIDGE_IN_SGX_SET_TRANSFER_CONTEXT_PRIORITY_TAG + { + IMG_UINT32 ui32BridgeFlags; + #if defined (SUPPORT_SID_INTERFACE) + IMG_SID hDevCookie; + IMG_SID hHWTransferContext; + #else + IMG_HANDLE hDevCookie; + IMG_HANDLE hHWTransferContext; + #endif + IMG_UINT32 ui32Priority; + IMG_UINT32 ui32OffsetOfPriorityField; +}PVRSRV_BRIDGE_IN_SGX_SET_TRANSFER_CONTEXT_PRIORITY; + + +typedef struct PVRSRV_BRIDGE_IN_SGX_SET_RENDER_CONTEXT_PRIORITY_TAG { IMG_UINT32 ui32BridgeFlags; #if defined (SUPPORT_SID_INTERFACE) IMG_SID hDevCookie; - IMG_SID hDevMemContext; + IMG_SID hHWRenderContext; #else IMG_HANDLE hDevCookie; - IMG_HANDLE hDevMemContext; + IMG_HANDLE hHWRenderContext; #endif -}PVRSRV_BRIDGE_IN_SGX_GETMMU_PDADDR; - - -typedef struct PVRSRV_BRIDGE_OUT_SGX_GETMMU_PDADDR_TAG -{ - IMG_DEV_PHYADDR sPDDevPAddr; - PVRSRV_ERROR eError; -}PVRSRV_BRIDGE_OUT_SGX_GETMMU_PDADDR; + IMG_UINT32 ui32Priority; + IMG_UINT32 ui32OffsetOfPriorityField; +}PVRSRV_BRIDGE_IN_SGX_SET_RENDER_CONTEXT_PRIORITY; typedef struct PVRSRV_BRIDGE_IN_GETCLIENTINFO_TAG @@ -505,7 +515,10 @@ typedef struct PVRSRV_BRIDGE_IN_SGX_REGISTER_HW_RENDER_CONTEXT_TAG #else IMG_HANDLE hDevCookie; #endif - IMG_DEV_VIRTADDR sHWRenderContextDevVAddr; + IMG_CPU_VIRTADDR pHWRenderContextCpuVAddr; + IMG_UINT32 ui32HWRenderContextSize; + IMG_UINT32 ui32OffsetToPDDevPAddr; + IMG_HANDLE hDevMemContext; }PVRSRV_BRIDGE_IN_SGX_REGISTER_HW_RENDER_CONTEXT; typedef struct PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_RENDER_CONTEXT_TAG @@ -516,6 +529,7 @@ typedef struct PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_RENDER_CONTEXT_TAG #else IMG_HANDLE hHWRenderContext; #endif + IMG_DEV_VIRTADDR sHWRenderContextDevVAddr; }PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_RENDER_CONTEXT; typedef struct PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_RENDER_CONTEXT_TAG @@ -539,7 +553,10 @@ typedef struct PVRSRV_BRIDGE_IN_SGX_REGISTER_HW_TRANSFER_CONTEXT_TAG #else IMG_HANDLE hDevCookie; #endif - IMG_DEV_VIRTADDR sHWTransferContextDevVAddr; + IMG_CPU_VIRTADDR pHWTransferContextCpuVAddr; + IMG_UINT32 ui32HWTransferContextSize; + IMG_UINT32 ui32OffsetToPDDevPAddr; + IMG_HANDLE hDevMemContext; }PVRSRV_BRIDGE_IN_SGX_REGISTER_HW_TRANSFER_CONTEXT; typedef struct PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_TRANSFER_CONTEXT_TAG @@ -550,6 +567,7 @@ typedef struct PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_TRANSFER_CONTEXT_TAG #else IMG_HANDLE hHWTransferContext; #endif + IMG_DEV_VIRTADDR sHWTransferContextDevVAddr; }PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_TRANSFER_CONTEXT; typedef struct PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_TRANSFER_CONTEXT_TAG @@ -586,7 +604,10 @@ typedef struct PVRSRV_BRIDGE_IN_SGX_REGISTER_HW_2D_CONTEXT_TAG #else IMG_HANDLE hDevCookie; #endif - IMG_DEV_VIRTADDR sHW2DContextDevVAddr; + IMG_CPU_VIRTADDR pHW2DContextCpuVAddr; + IMG_UINT32 ui32HW2DContextSize; + IMG_UINT32 ui32OffsetToPDDevPAddr; + IMG_HANDLE hDevMemContext; }PVRSRV_BRIDGE_IN_SGX_REGISTER_HW_2D_CONTEXT; typedef struct PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_2D_CONTEXT_TAG @@ -597,6 +618,7 @@ typedef struct PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_2D_CONTEXT_TAG #else IMG_HANDLE hHW2DContext; #endif + IMG_DEV_VIRTADDR sHW2DContextDevVAddr; }PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_2D_CONTEXT; typedef struct PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_2D_CONTEXT_TAG |