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* Merge branch 'omap-for-linus' of ↵Linus Torvalds2011-03-171-149/+133
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6 * 'omap-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6: (258 commits) omap: zoom: host should not pull up wl1271's irq line arm: plat-omap: iommu: fix request_mem_region() error path OMAP2+: Common CPU DIE ID reading code reads wrong registers for OMAP4430 omap4: mux: Remove duplicate mux modes omap: iovmm: don't check 'da' to set IOVMF_DA_FIXED flag omap: iovmm: disallow mapping NULL address when IOVMF_DA_ANON is set omap2+: mux: Fix compile when CONFIG_OMAP_MUX is not selected omap4: board-omap4panda: Initialise the serial pads omap3: board-3430sdp: Initialise the serial pads omap4: board-4430sdp: Initialise the serial pads omap2+: mux: Add macro for configuring static with omap_hwmod_mux_init omap2+: mux: Remove the use of IDLE flag omap2+: Add separate list for dynamic pads to mux perf: add OMAP support for the new power events OMAP4: Add IVA OPP enteries. OMAP4: Update Voltage Rail Values for MPU, IVA and CORE OMAP4: Enable 800 MHz and 1 GHz MPU-OPP OMAP3+: OPP: Replace voltage values with Macros OMAP3: wdtimer: Fix CORE idle transition Watchdog: omap_wdt: add fine grain runtime-pm ... Fix up various conflicts in - arch/arm/mach-omap2/board-omap3evm.c - arch/arm/mach-omap2/clock3xxx_data.c - arch/arm/mach-omap2/usb-musb.c - arch/arm/plat-omap/include/plat/usb.h - drivers/usb/musb/musb_core.h
| * OMAP3: PM: Clear the SCTLR C bit in asm code to prevent data cache allocationSantosh Shilimkar2011-03-101-0/+27
| | | | | | | | | | | | | | | | | | | | | | On the newer ARM processors like CortexA8, CortexA9, the caches can be speculatively loaded while they are getting flushed. Clear the SCTLR C bit to prevent further data cache allocation as part of cache clean routine Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * OMAP3: PM: Remove un-necessary cp15 registers form low power cpu contextSantosh Shilimkar2011-03-101-116/+40
| | | | | | | | | | | | | | | | | | | | | | The current code saves few un-necessary registers which are read-only or write-only, unused CP15 registers. Remove them and keep only necessary CP15 registers part of low power context save/restore. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * OMAP3: PM: Allow the cache clean when L1 is lost.Santosh Shilimkar2011-03-101-12/+3
| | | | | | | | | | | | | | | | | | | | | | When L1 cache is suppose to be lost, it needs to be cleaned before entrering to the low power mode. While at this, also fix few comments and remove un-necessary clean_l2 lable. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * OMAP3: PM: Fix the MMU on sequence in the asm codeSantosh Shilimkar2011-03-101-0/+5
| | | | | | | | | | | | | | | | Add necessary barriers after enabling MMU. Also use the sane way to load pc and jump to it instead of executing ldma first up. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * OMAP3: PM: Use ARMv7 supported instructions instead of legacy CP15 onesSantosh Shilimkar2011-03-101-11/+10
| | | | | | | | | | | | | | | | | | On ARMv7 dsb, dmb instructions are supported and can be used directly instead of their cp15 equivalnet. Also remove the opcodes for smc and use the available instruction directly in OMAP3 low power asm code Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * ARM: omap3: Thumb-2 compatibility for sleep34xx.SDave Martin2011-03-091-5/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Build unconditionally as ARM for correct interoperation with OMAP firmware. * Fix an out-of-range ADR when building for ARM. * Remove deprecated PC-relative stores. * Add the required ENDPROC() directive for each ENTRY(). * .align before data words. * Handle non-interworking return from v7_flush_dcache_all. Signed-off-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * ARM: omap3: Remove hand-encoded SMC instructionsDave Martin2011-03-091-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For various reasons, Linux now only officially supports being built with tools which are new enough to understand the SMC instruction. Replacing the hand-encoded instructions when the mnemonic also allows for correct assembly in Thumb-2 (otherwise, the result is random data in the middle of the code). The Makefile already ensures that this file is built with a high enough gcc -march= flag (armv7-a). Signed-off-by: Dave Martin <dave.martin@linaro.org> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* | ARM: 6649/1: omap: use fncpy to copy the PM code functions to SRAMJean Pihet2011-02-041-0/+2
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | The new fncpy API is better suited* for copying some code to SRAM at runtime. This patch changes the ad-hoc code to the more generic fncpy API. *: 1. fncpy ensures that the thumb mode bit is propagated, 2. fncpy provides the security of type safety between the original function and the sram function pointer. Tested OK on OMAP3 in low power modes (RET/OFF) using omap2plus_defconfig with !CONFIG_THUMB2_KERNEL. Compile tested on OMAP1/2 using omap1_defconfig. Boot tested on OMAP1 & OMAP2 Tested OK with suspend/resume on OMAP2420/n810 Boots fine on osk5912 and n800 Signed-off-by: Jean Pihet <j-pihet@ti.com> Acked-by: Kevin Hilman <khilman@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Dave Martin <dave.martin@linaro.org> Tested-by: Kevin Hilman <khilman@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* OMAP2/3: PRCM: split OMAP2/3-specific PRCM code into OMAP2/3-specific filesPaul Walmsley2010-12-211-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation for adding OMAP4-specific PRCM accessor/mutator functions, split the existing OMAP2/3 PRCM code into OMAP2/3-specific files. Most of what was in mach-omap2/{cm,prm}.{c,h} has now been moved into mach-omap2/{cm,prm}2xxx_3xxx.{c,h}, since it was OMAP2xxx/3xxx-specific. This process also requires the #includes in each of these files to be changed to reference the new file name. As part of doing so, add some comments into plat-omap/sram.c and plat-omap/mcbsp.c, which use "sideways includes", to indicate that these users of the PRM/CM includes should not be doing so. Thanks to Felipe Contreras <felipe.contreras@gmail.com> for comments on this patch. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Jarkko Nikula <jhnikula@gmail.com> Cc: Peter Ujfalusi <peter.ujfalusi@nokia.com> Cc: Liam Girdwood <lrg@slimlogic.co.uk> Cc: Omar Ramirez Luna <omar.ramirez@ti.com> Acked-by: Omar Ramirez Luna <omar.ramirez@ti.com> Cc: Felipe Contreras <felipe.contreras@gmail.com> Acked-by: Felipe Contreras <felipe.contreras@gmail.com> Cc: Greg Kroah-Hartman <greg@kroah.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com> Tested-by: Kevin Hilman <khilman@deeprootsystems.com> Tested-by: Rajendra Nayak <rnayak@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* OMAP3: ASM sleep code format reworkJean Pihet2010-12-211-107/+117
| | | | | | | | | | | | | | | | Cosmetic fixes to the code: - white spaces and tabs, - alignement, - comments rephrase and typos, - multi-line comments Tested on N900 and Beagleboard with full RET and OFF modes, using cpuidle and suspend. Signed-off-by: Jean Pihet <j-pihet@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3: add comments for low power code errataJean Pihet2010-12-211-0/+11
| | | | | | | | | | | | | | | Errata covered: - 1.157 & 1.185 - i443 - i581 Tested on N900 and Beagleboard with full RET and OFF modes, using cpuidle and suspend. Signed-off-by: Jean Pihet <j-pihet@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3: rework of the ASM sleep code execution pathsJean Pihet2010-12-211-131/+187
| | | | | | | | | | | | | | | | - Reworked and simplified the execution paths for better readability and to avoid duplication of code, - Added comments on the entry and exit points and the interaction with the ROM code for OFF mode restore, - Reworked the existing comments for better readability. Tested on N900 and Beagleboard with full RET and OFF modes, using cpuidle and suspend. Signed-off-by: Jean Pihet <j-pihet@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3: re-organize the ASM sleep codeJean Pihet2010-12-211-53/+61
| | | | | | | | | | | | | | | Organize the code in the following sections: - register access macros, - API functions, - internal functions. Tested on N900 and Beagleboard with full RET and OFF modes, using cpuidle and suspend. Signed-off-by: Jean Pihet <j-pihet@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3: remove hardcoded values from the ASM sleep codeJean Pihet2010-12-211-11/+18
| | | | | | | | | | | | | | | Using macros from existing include files for registers addresses. Tested on N900 and Beagleboard with full RET and OFF modes, using cpuidle and suspend. Based on original patch from Vishwa. Signed-off-by: Jean Pihet <j-pihet@ti.com> Cc: Vishwanath BS <vishwanath.bs@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP2+: use global values for the SRAM PA addressesJean Pihet2010-12-211-0/+1
| | | | | | | | | | | | | | | | The SRAM PA addresses are locally defined and used at different places, i.e. SRAM management code and idle sleep code. The macros are now defined at a centralized place, for easier maintenance. Tested on N900 and Beagleboard with full RET and OFF modes, using cpuidle and suspend. Signed-off-by: Jean Pihet <j-pihet@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Nishanth Menon<nm@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3: remove unused code from the ASM sleep codeJean Pihet2010-12-211-52/+6
| | | | | | | | | | | | | | | | | | Remove unused code: - macros, - variables, - unused semaphore locking API. This API shall be added back when needed, - infinite loops for debug. Tested on N900 and Beagleboard with full RET and OFF modes, using cpuidle and suspend. Signed-off-by: Jean Pihet <j-pihet@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com> Tested-by: Nishanth Menon<nm@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3630: PM: Disable L2 cache while invalidating L2 cachePeter 'p2' De Schrijver2010-12-211-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | While coming out of MPU OSWR/OFF states, L2 controller is reseted. The reset behavior is implementation specific as per ARMv7 TRM and hence $L2 needs to be invalidated before it's use. Since the AUXCTRL register is also reconfigured, disable L2 cache before invalidating it and re-enables it afterwards. This is as per Cortex-A8 ARM documentation. Currently this is identified as being needed on OMAP3630 as the disable/enable is done from "public side" while, on OMAP3430, this is done in the "secure side". Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Tony Lindgren <tony@atomide.com> Acked-by: Jean Pihet <j-pihet@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [nm@ti.com: ported to 2.6.37-rc2, added hooks to enable the logic only on 3630] Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Eduardo Valentin <eduardo.valentin@nokia.com> Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3630: PM: Erratum i608: disable RTANishanth Menon2010-12-211-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | Erratum id: i608 RTA (Retention Till Access) feature is not supported and leads to device stability issues when enabled. This impacts modules with embedded memories on OMAP3630 Workaround is to disable RTA on boot and coming out of core off. For disabling RTA coming out of off mode, we do this by overriding the restore pointer for 3630 as the first point of entry before caches are touched and is common for GP and HS devices. To disable earlier than this could be possible by modifying the PPA for HS devices, but not for GP devices. Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Tony Lindgren <tony@atomide.com> Acked-by: Jean Pihet <j-pihet@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [ambresh@ti.com: co-developer] Signed-off-by: Ambresh K <ambresh@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3: PM: Erratum i581 support: dll kick strategyPeter 'p2' De Schrijver2010-12-211-5/+50
| | | | | | | | | | | | | | | | | | | | | | | | | Erratum i581 impacts OMAP3 platforms. PRCM DPLL control FSM removes SDRC_IDLEREQ before DPLL3 locks causing the DPLL not to be locked at times. IMPORTANT: *) This is not a complete workaround implementation as recommended by the silicon erratum. This is a support logic for detecting lockups and attempting to recover where possible and is known to provide stability in multiple platforms. *) This code is mostly important for inactive and retention. The ROM code waits for the maximum DLL lock time when resuming from off mode. So for off mode this code isn't really needed. *) counters are introduced here for eventual export to userspace once the cleanups are completed. This should eventually get refactored as part of cleanups to sleep34xx.S Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3: PM: Update clean_l2 to use v7_flush_dcache_allRichard Woodruff2010-12-211-66/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | Analysis in TI kernel with ETM showed that using cache mapped flush in kernel instead of SO mapped flush cost drops by 65% (3.39mS down to 1.17mS) for clean_l2 which is used during sleep sequences. Overall: - speed up - unfortunately there isn't a good alternative flush method today - code reduction and less maintenance and potential bug in unmaintained code This also fixes the bug with the clean_l2 function usage. Reported-by: Tony Lindgren <tony@atomide.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Tony Lindgren <tony@atomide.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> [nm@ti.com: ported rkw's proposal to 2.6.37-rc2] Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Richard Woodruff <r-woodruff2@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP: control: move plat-omap/control.h to mach-omap2/control.hPaul Walmsley2010-10-081-1/+1
| | | | | | | | | | | | | | | | | Only OMAP2+ platforms have the System Control Module (SCM) IP block. In the past, we've kept the SCM header file in plat-omap. This has led to abuse - device drivers including it; includes being added that create implicit dependencies on OMAP2+ builds; etc. In response, move the SCM headers into mach-omap2/. As part of this, remove the direct SCM access from the OMAP UDC driver. It was clearly broken. The UDC code needs an indepth review for use on OMAP2+ chips. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Cory Maccarrone <darkstar6262@gmail.com> Cc: Kyungmin Park <kyungmin.park@samsung.com>
* fix typos concerning "acquire"Uwe Kleine-König2010-06-161-1/+1
| | | | | Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
* OMAP3: PM: Added support for L2 aux ctrl register save and restoreTero Kristo2010-02-231-2/+24
| | | | | | | | | | | | | | | | | This patch adds a save and restore mechanism for ARM L2 auxiliary control register. The feature is enabled by default for GP devices, but for HS/EMU devices the user must enable the service and define the PPA service ID to be used for setting L2 aux ctrl, as this is not currently supported by the bootloader. If nobody alters the contents of L2 aux ctrl from its reset value, this feature is not needed. Kconfig option to enable HS/EMU L2 aux save and restore: - OMAP3_L2_AUX_SECURE_SAVE_RESTORE Kconfig option to select HS/EMU PPA service for setting L2 aux ctrl: - OMAP3_L2_AUX_SECURE_SERVICE_SET_ID Signed-off-by: Tero Kristo <tero.kristo@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3: PM: add scratchpad locking functionRajendra Nayak2010-02-231-0/+33
| | | | | | | | | This patch implements locking using the semaphore in scratchpad memory preventing any concurrent access to scratchpad from OMAP and Baseband/Modem processor. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* ARM: OMAP4: PM: OMAP4 Power Domain Porting Related Clean-up.Abhijit Pagare2010-01-261-1/+1
| | | | | | | | | | Module offsets were same for OMAP2 and OMAP3 while they differ for OMAP4. Hence we need different macros for identifying platform specific offsets. Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Rajendra Nayak <rnayak@ti.com>
* OMAP3: Fixed ARM aux ctrl register save/restoreTero Kristo2010-01-201-4/+9
| | | | | | | | | Current value is stored on SDRAM and it is written back during wakeup. Previously a static value of 0x72 was written there. Signed-off-by: Tero Kristo <tero.kristo@nokia.com> Acked-by: Thara Gopinath <thara@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3: PM: Wait for SDRC ready iso a blind delayPeter 'p2' De Schrijver2009-11-111-12/+36
| | | | | | | | This patch improves the wakeup SRAM code polling the SDRC to become ready instead of just waiting for a fixed amount of time. Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3: PM: SDRC auto-refresh workaround for off-modeTero Kristo2009-11-111-1/+83
| | | | | | | | | Errata: ES3.0, ES3.1 SDRC not sending auto-refresh when OMAP wakes-up from OFF mode Signed-off-by: Tero Kristo <tero.kristo@nokia.com> Signed-off-by: Kalle Jokiniemi <kalle.jokiniemi@digia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3: PM: Fix secure SRAM context save/restoreKalle Jokiniemi2009-11-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | The secure sram context save uses dma channels 0 and 1. In order to avoid collision between kernel DMA transfers and ROM code dma transfers, we need to reserve DMA channels 0 1 on high security devices. A bug in ROM code leaves dma irq status bits uncleared. Hence those irq status bits need to be cleared when restoring DMA context after off mode. There was also a faulty parameter given to PPA in the secure ram context save assembly code, which caused interrupts to be enabled during secure ram context save. This caused the save to fail sometimes, which resulted the saved context to be corrupted, but also left DMA channels in secure mode. The secure mode DMA channels caused "DMA secure error with device 0" errors to be displayed. Signed-off-by: Kalle Jokiniemi <kalle.jokiniemi@digia.com> Signed-off-by: Jouni Hogander <jouni.hogander@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3 PM: off-mode support for HS/EMU devicesTero Kristo2009-11-111-1/+74
| | | | | | | | | For HS/EMU devices, some additional resources need to be saved/restored for off-mode support. Namely, saving the secure RAM and a pointer to it in the scratchpad. Signed-off-by: Tero Kristo <tero.kristo@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3: PM: MPU off-mode supportRajendra Nayak2009-11-111-7/+4
| | | | | | | | Adds a 'save_state' option when calling into SRAM idle function and adds some minor cleanups of SRAM asm code. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* omap: headers: Move remaining headers from include/mach to include/platTony Lindgren2009-10-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the remaining headers under plat-omap/include/mach to plat-omap/include/plat. Also search and replace the files using these headers to include using the right path. This was done with: #!/bin/bash mach_dir_old="arch/arm/plat-omap/include/mach" plat_dir_new="arch/arm/plat-omap/include/plat" headers=$(cd $mach_dir_old && ls *.h) omap_dirs="arch/arm/*omap*/ \ drivers/video/omap \ sound/soc/omap" other_files="drivers/leds/leds-ams-delta.c \ drivers/mfd/menelaus.c \ drivers/mfd/twl4030-core.c \ drivers/mtd/nand/ams-delta.c" for header in $headers; do old="#include <mach\/$header" new="#include <plat\/$header" for dir in $omap_dirs; do find $dir -type f -name \*.[chS] | \ xargs sed -i "s/$old/$new/" done find drivers/ -type f -name \*omap*.[chS] | \ xargs sed -i "s/$old/$new/" for file in $other_files; do sed -i "s/$old/$new/" $file done done for header in $(ls $mach_dir_old/*.h); do git mv $header $plat_dir_new/ done Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP2/3: PM: push core PM code from linux-omapKevin Hilman2009-05-281-0/+436
This patch is to sync the core linux-omap PM code with mainline. This code has evolved and been used for a while the linux-omap tree, but the attempt here is to finally get this into mainline. Following this will be a series of patches from the 'PM branch' of the linux-omap tree to add full PM hardware support from the linux-omap tree. Much of this PM core code was written by Jouni Hogander with significant contributions from Paul Walmsley as well as many others from Nokia, Texas Instruments and linux-omap community. Signed-off-by: Jouni Hogander <jouni.hogander@nokia.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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