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* USB: Added suppport for Samsung UDC controller and Android gadget (ADB+UMS)Brian Swetland2011-11-162-0/+12
| | | | | | Following files are modified- 1: mach-herring.c: Add mass storage device only if mass storage is defined in config. 2: devs.c: Added config macros for mass storage.
* sdhci: enable t-flash.Seungwon2011-11-163-2/+16
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* S5PC110: APM: Add Power Management SupportSungjun Bae2011-11-168-593/+29
| | | | | | This patch adds suspend-to-ram support for S5PC110. Signed-off-by: Sungjun Bae <june.bae@samsung.com>
* ARM: S5PC110: MFC: MFC (Multi Format Codec) 5.0 video encoder/decoderBrian Swetland2011-11-169-0/+394
| | | | | | Signed-off-by: Sungjun Bae <june.bae@samsung.com> Signed-off-by: Choi jonghwan <jhbird.choi@samsung.com> Signed-off-by: huisung.kang <hs1218.kang@samsung.com>
* [TOUCH] qt602240_qtts add, add wakelock, defconfig updateChoi Jong-hwan2011-11-161-0/+3
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* USB: Added/modified files for USB and Android Gadget Support.Pankaj2011-11-165-1/+214
| | | | | | | | | | | | | | | | | Added new files - 1: param.h: Required by fsa9480_i2c driver. 2: fsa9480_i2c.h: Header file for fsa9480_i2c driver. Modified files: 1: cpu.c: Added mapping for OTG address. 2: mach-herring.c: Modified usb-otg clock name. Added new devices as usb_gadget and android_gadget in device list. 3: devs.c: Added platform data for Android gadget. 4: devs.h: added extern definition for android gadgets. 6: gadget_chips: Added new entry for s3c_udc gadget. 7: s3c_udc.h: Added new member related to dma mapping in structure s3c_request. 8: s3c_udc_otg.c: Changed clock name from usbotg to otg. 9: s3c_udc_otg_xfer_dma.c: Modified for dma functionality. disable debug message
* ARM: S5PV210: CPUFREQ: Add codes of control ARM, INT voltageHuisung Kang2011-11-161-8/+85
| | | | | Change-Id: Ib7b9be99cece87ed55d2113521fc3d29a3affc28 Signed-off-by: Huisung Kang <hs1218.kang@samsung.com>
* ARM: S5PV210: CPUFREQ: Add additional symantics for "relation" in cpufreq ↵huisung.kang2011-11-161-1/+30
| | | | | | | | | | | | | with pm. relation has an additional symantics other than the standard. s5pv210_target function have below additional relations - DISABLE_FURTHER_CPUFREQ : disable futher access to target until being re-enabled. - ENABLE_FURTHER_CPUFREQ : re-enable access to target Change-Id: Iadab2eecf91f4dd8cecf35f2ab144c7bc8f00867 Signed-off-by: huisung.kang <hs1218.kang@samsung.com> Signed-off-by: Kisoo Yu <ksoo.yu@samsung.com>
* ARM: S5PC110: USB UDC supportBrian Swetland2011-11-163-0/+287
| | | | | Signed-off-by: Minsu Kim <minsu78.kim@samsung.com> Signed-off-by: sb223.kang <sb223.kang@samsung.com>
* sdhci: setup mach code.Arve Hjønnevåg2011-11-164-16/+153
| | | | Change-Id: I6b8fb26e7c9859adc84b73ecb5121cfb01e00226
* S5PC110: HERRING: DMA: Add old DMA driver.Jaehun Jung2011-11-1610-6/+3814
| | | | | Old DMA driver porting is Done. DMA can not test alone. So, Sound will be test DMA driver (Old & New).
* [GPIO] add gpio macro & defineChoi Jong-hwan2011-11-162-2/+77
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* [GPIO] gpio_set_pin addChoi Jong-hwan2011-11-163-0/+32
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* [IRQ] irq-eint-group addChoi Jong-hwan2011-11-162-1/+523
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* i2c : migration from 2.6.32Seungwon2011-11-167-13/+115
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* [BATTERY] change sec_fake_battery add positionChoi Jong-hwan2011-11-161-3/+3
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* S5PC110: HERRING: Support PWM for HERRING and fixup default configuration.Jaecheol Lee2011-11-162-2/+28
| | | | | | | Add support PWM and android pmem configuration for HERRING. Change-Id: I02a2fed0b8cdb01c8bcecc972d37245917f85520 Signed-off-by: Jaecheol Lee <jc.lee@samsung.com>
* [CREPO] boot up, yaffs mount, android run SuccessChoi Jong-hwan2011-11-162-2/+6
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* S5PC110: HERRING: Modified machine fileHyunwoong Kim2011-11-161-3/+12
| | | | | Change-Id: If13e3e2c968f93b6dbe08325da76658709666271 Signed-off-by: Hyunwoong Kim <khw0178.kim@samsung.com>
* S5PC110: HERRING: Added platform data file for FIMC and register filesHyunwoong Kim2011-11-168-29/+744
| | | | | Change-Id: Ib602abe59fdcae937aa05818462f2919af187fb7 Signed-off-by: Hyunwoong Kim <khw0178.kim@samsung.com>
* S5PC110: HERRING: Added FIMC set up files and Modified machine filesHyunwoong Kim2011-11-166-12/+211
| | | | | Change-Id: Icffb4c9c6fbc2ee5a5027b54b0738b4352b0dc0e Signed-off-by: Hyunwoong Kim <khw0178.kim@samsung.com>
* S5PC110: HERRING: PM: S5P Power managerSungjun Bae2011-11-1611-72/+904
| | | | S5P Power Manager (Suspend-To-RAM) support
* S5PC110: HERRING: TIMER: Support HRT and tickless idle on S5PC110Sungjun Bae2011-11-1616-3/+699
| | | | | | | | | Enabling High resolution timer service and tickless idle (Dynamic idle tick) on S5PC110. RTC/SYSTEM_TIMER are used for this features. This feature is disabled by default configuration, need to change configuration in menuconfig. Change-Id: Ieecfee19a3c0cad0443cd2d35a4821ebbf1eeea3
* S5PC110: HERRING: TIMER: Compile error for some definitions.Sungjun Bae2011-11-161-0/+2
| | | | | CONFIG_GENERIC_CLOCKEVENTS was caused compile error for "sys_timer" structure and "timer_tick" function.
* PMEM: HERRING: Added android pmem support for HERRINGJaecheol Lee2011-11-162-0/+26
| | | | | | HERRING uses android pmem allocator. Signed-off-by: Jaecheol Lee <jc.lee@samsung.com>
* S5PC110: HERRING: Remove unnecessary header including in FIMDJanghyuck Kim2011-11-161-1/+0
| | | | Signed-off-by: Janghyuck Kim <janghyuck.kim@samsung.com>
* S5PC110: HERRING: Add machine files for FIMDJanghyuck Kim2011-11-165-1/+486
| | | | Signed-off-by: Janghyuck Kim <janghyuck.kim@samsung.com>
* S5PC110: HERRING: add plat-s5p data for FIMDJanghyuck Kim2011-11-165-0/+652
| | | | Signed-off-by: Janghyuck Kim <janghyuck.kim@samsung.com>
* S5PC110: HERRING: Add bootmem for reserved memoryBrian Swetland2011-11-162-0/+222
| | | | | Signed-off-by: Janghyuck Kim <janghyuck.kim@samsung.com> Signed-off-by: huisung.kang <hs1218.kang@samsung.com>
* S5PC110: I2C: Add I2C configuration for S5PV210 and HERRING board.Jaecheol Lee2011-11-161-0/+6
| | | | Signed-off-by: Jaechoel Lee <jc.lee@samsung.com>
* S5PC110: HERRING: Add and modified machine support header filesJaecheol Lee2011-11-164-318/+266
| | | | | | Header files for machine HERRING. Signed-off-by: Jaecheol Lee <jc.lee@samsung.com>
* S5PC110: HERRING: Modified herring dependent code.Brian Swetland2011-11-161-4/+3140
| | | | | | Change-Id: I6cb71ed89b5d22d38c409bdfbeab0c99900e93d9 Signed-off-by: Jaecheol Lee <jc.lee@samsung.com> Signed-off-by: Janghyuck Kim <janghyuck.kim@samsung.com>
* S5PC110: GPIO: Add platform specific GPIO definition for herring.Jaecheol Lee2011-11-161-0/+796
| | | | | | Based on arise's header file. Signed-off-by: Jaecheol Lee <jc.lee@samsung.com>
* S5PC110: GPIO: Add S5PC110 dependent GPIO library functionsJaecheol Lee2011-11-161-3/+108
| | | | | | Some S5PC110 specific GPIO function were added. Signed-off-by: Jaecheol Lee<jc.lee@samsung.com>
* HERRING: DEV: Add devs.c file.jake2011-11-164-0/+615
| | | | Change-Id: Id12baeeb30e512d040f8e32d4ce65bc587b6300e
* HERRING: INIT: device initialze for kernel booting.jake2011-11-168-4/+145
| | | | | | | HERRING: Makefile: Change zreload address configuration. Change-Id: I82bb62e0b77b14e0f962377ac246d537bc243c0b HERRING: Makefile: Bug fix at zreload base.
* ARM: common: fiq_debugger: dump sysrq directly to console if enabledDima Zavin2011-11-141-4/+28
| | | | | | | If the fiq console is enabled, then don't filter the console output while sysrq command is in progress. Change-Id: I9389d757373a5fdca5cbf61f0723667510d3ae88
* ARM: common: fiq_debugger: add irq context debug functionsDima Zavin2011-11-142-21/+62
| | | | | | | This code is moved here from the drivers/misc/kernel_debugger. Change-Id: Iccf21c4313a8516a917125ca93f64baa5f354228 Signed-off-by: Dima Zavin <dima@android.com>
* ARM: idle: update idle ticks before call idle end notifierTodd Poynor2011-11-091-1/+1
| | | | | | | | | | Such that interactive cpufreq governor uses up-to-date idle time information. Reported by Colin Cross <ccross@android.com> Change-Id: I06425444f800f803afc9dc7a6ad0fdb46c918bb6 Signed-off-by: Todd Poynor <toddpoynor@google.com>
* ARM: common: fiq_debugger: make uart irq be no_suspendDima Zavin2011-10-281-1/+1
| | | | | Change-Id: I8e3d2a95c0ddc2706b021cd33534fe2fd302268e Signed-off-by: Dima Zavin <dima@android.com>
* Merge commit 'v3.0.8' into android-3.0Colin Cross2011-10-2714-26/+112
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| * ARM: 7117/1: perf: fix HW_CACHE_* events on Cortex-A9Will Deacon2011-10-251-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 29a541f6c1f6e4a85628bb86071b9e72c9f8be2c upstream. Using COHERENT_LINE_{MISS,HIT} for cache misses and references respectively is completely wrong. Instead, use the L1D events which are a better and more useful approximation despite ignoring instruction traffic. Reported-by: Alasdair Grant <alasdair.grant@arm.com> Reported-by: Matt Horsnell <matt.horsnell@arm.com> Reported-by: Michael Williams <michael.williams@arm.com> Cc: Jean Pihet <j-pihet@ti.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * ARM: 7113/1: mm: Align bank start to MAX_ORDER_NR_PAGESLinus Walleij2011-10-251-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 002ea9eefec98dada56fd5f8e432a4e8570c2a26 upstream. The VM subsystem assumes that there are valid memmap entries from the bank start aligned to MAX_ORDER_NR_PAGES. On the Ux500 we have a lot of mem=N arguments on the commandline triggering this bug several times over and causing kernel oops messages. Cc: Michael Bohan <mbohan@codeaurora.org> Cc: Nicolas Pitre <nico@fluxnic.net> Signed-off-by: Johan Palsson <johan.palsson@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * ARM: mach-ux500: enable fix for ARM errata 754322srinidhi kasagar2011-10-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | commit 98e87d57aab9b1594f9cc53a386fcb6f2f2ba6e2 upstream. This applies ARM errata fix 754322 for all ux500 platforms. Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * ARM: 7099/1: futex: preserve oldval in SMP __futex_atomic_opWill Deacon2011-10-031-17/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit df77abcafc8dc881b6c9347548651777088e4b27 upstream. The SMP implementation of __futex_atomic_op clobbers oldval with the status flag from the exclusive store. This causes it to always read as zero when performing the FUTEX_OP_CMP_* operation. This patch updates the ARM __futex_atomic_op implementations to take a tmp argument, allowing us to store the strex status flag without overwriting the register containing oldval. Reported-by: Minho Ban <mhban@samsung.com> Reviewed-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * ARM: 7091/1: errata: D-cache line maintenance operation by MVA may not succeedWill Deacon2011-10-033-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit f630c1bdfbf8fe423325beaf60027cfc7fd7c610 upstream. This patch implements a workaround for erratum 764369 affecting Cortex-A9 MPCore with two or more processors (all current revisions). Under certain timing circumstances, a data cache line maintenance operation by MVA targeting an Inner Shareable memory region may fail to proceed up to either the Point of Coherency or to the Point of Unification of the system. This workaround adds a DSB instruction before the relevant cache maintenance functions and sets a specific bit in the diagnostic control register of the SCU. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * ARM: dma-mapping: free allocated page if unable to mapRussell King2011-10-031-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | commit d8e89b47e00ee80e920761145144640aac4cf71a upstream. If the attempt to map a page for DMA fails (eg, because we're out of mapping space) then we must not hold on to the page we allocated for DMA - doing so will result in a memory leak. Reported-by: Bryan Phillippe <bp@darkforest.org> Tested-by: Bryan Phillippe <bp@darkforest.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * ARM: Dove: fix second SPI initialization callNicolas Pitre2011-10-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | commit 72cc205611879525db0374d9831f84f787112b25 upstream. Commit 980f9f601a "ARM: orion: Consolidate SPI initialization." broke it by overwriting the SPI0 registration. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * ARM: davinci: fix cache flush build errorLinus Walleij2011-10-031-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 897a6a1a14837d6d582bfd1fd7aba00be44b6469 upstream. The TNET variant of DaVinci compiles some code that it shares with other DaVinci variants, however it has a V6 CPU rather than an ARM926T, thus the hardcoded call to arm926_flush_kern_cache_all() in sleep.S will obviously fail, and we need to build with the v6_flush_kern_cache_all() call instead. This was triggered by manually altering the DaVinci config to build the TNET version. Cc: Dave Martin <dave.martin@linaro.org> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * ARM: davinci: da850 EVM: read mac address from SPI flashSudhakar Rajashekhara2011-10-031-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 810198bc9c109489dfadc57131c5183ce6ad2d7d upstream. DA850/OMAP-L138 EMAC driver uses random mac address instead of a fixed one because the mac address is not stuffed into EMAC platform data. This patch provides a function which reads the mac address stored in SPI flash (registered as MTD device) and populates the EMAC platform data. The function which reads the mac address is registered as a callback which gets called upon addition of MTD device. NOTE: In case the MAC address stored in SPI flash is erased, follow the instructions at [1] to restore it. [1] http://processors.wiki.ti.com/index.php/GSG:_OMAP-L138_DVEVM_Additional_Procedures#Restoring_MAC_address_on_SPI_Flash Modifications in v2: Guarded registering the mtd_notifier only when MTD is enabled. Earlier this was handled using mtd_has_partitions() call, but this has been removed in Linux v3.0. Modifications in v3: a. Guarded da850_evm_m25p80_notify_add() function and da850evm_spi_notifier structure with CONFIG_MTD macros. b. Renamed da850_evm_register_mtd_user() function to da850_evm_setup_mac_addr() and removed the struct mtd_notifier argument to this function. c. Passed the da850evm_spi_notifier structure to register_mtd_user() function. Modifications in v4: Moved the da850_evm_setup_mac_addr() function within the first CONFIG_MTD ifdef construct. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>