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path: root/drivers/gpu/drm/i915/i915_reg.h
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* Merge branch 'master' of /home/airlied/kernel/linux-2.6 into drm-core-nextDave Airlie2011-01-051-0/+10
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| * drm/i915: Verify Ironlake eDP presence on DP_A using the capability fuseChris Wilson2010-12-231-0/+7
| * drm/i915: Set the required VFMUNIT clock gating disable on Ironlake.Eric Anholt2010-12-231-0/+3
* | drm/i915: dynamic render p-state support for Sandy BridgeJesse Barnes2010-12-181-1/+7
* | drm/i915: Add support for precise vblank timestamping (v2)Mario Kleiner2010-12-161-0/+1
* | drm/i915: Add frame buffer compression on SandybridgeYuanhan Liu2010-12-151-0/+10
* | drm/i915: Add self-refresh support on SandybridgeYuanhan Liu2010-12-151-0/+40
* | drm/i915: Enable RC6 autodownclocking on SandybridgeChris Wilson2010-12-091-0/+59
* | drm/i915: Terminate the FORCE WAKE after we have finished readingChris Wilson2010-12-091-0/+1
* | drm/i915: Implement GPU semaphores for inter-ring synchronisation on SNBChris Wilson2010-12-051-1/+18
* | drm/i915: Enable CB tuning of the Display PLLChris Wilson2010-12-051-0/+1
* | Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson2010-12-021-0/+1
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| * drm/i915: Always set the DP transcoder config to 8BPC.Eric Anholt2010-12-021-0/+1
* | drm/i915: Add a mechanism for pipelining fence register updatesDaniel Vetter2010-11-251-1/+7
* | drm/i915: Add support for GPU reset on gen6.Eric Anholt2010-11-221-0/+6
* | drm/i915: Capture interesting display registers on errorChris Wilson2010-11-221-1/+5
* | drm/i915: Remove the definitions for Primary Ring BufferChris Wilson2010-11-111-4/+6
* | drm/i915/ringbuffer: set FORCE_WAKE bit before reading ring registerZou Nan hai2010-11-111-0/+1
* | drm/i915: Apply display workaround required according to the B-Spec.Eric Anholt2010-11-081-0/+2
* | drm/i915: Apply B-spec mandated workaround for read flushes on Ironlake.Eric Anholt2010-11-081-0/+13
* | drm/i915: Record BSD engine error stateChris Wilson2010-10-291-0/+4
* | drm/i915: Record BLT engine error stateChris Wilson2010-10-291-0/+4
* | drm/i915: Capture ERROR register on Sandybridge hangsChris Wilson2010-10-271-0/+2
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* i915: enable AVI infoframe for intel_hdmi.c [v4]David Härdeman2010-10-221-0/+16
* drm/i915: Enable SandyBridge blitter ringChris Wilson2010-10-211-0/+2
* drm/i915: Remove duplicate set of ADPA definitionsChris Wilson2010-10-191-7/+1
* drm/i915: Update hotplug interrupts register definitions for SandybridgeYuanhan Liu2010-10-081-0/+4
* drm/i915: diasable clock gating for the panel power sequencerJesse Barnes2010-10-081-0/+3
* drm/i915: add Ironlake clock gating workaround for FDI link trainingJesse Barnes2010-10-081-0/+1
* drm/i915/dp: eDP power sequencing fixesJesse Barnes2010-10-081-0/+3
* Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson2010-10-031-2/+3
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* | drm/i915: Try to reset gen2 devices.Chris Wilson2010-10-011-0/+11
* | drm/i915: kill per-ring macrosDaniel Vetter2010-09-251-28/+7
* | drm/i915: kill now unnecessary gtt defines from i915_reg.hDaniel Vetter2010-09-251-40/+2
* | drm/i915: add relative ring register macrosDaniel Vetter2010-09-211-0/+8
* | drm/i915: kill duplicated/unneeded register definesDaniel Vetter2010-09-211-18/+0
* | drm/i915: add a new BSD ring buffer for SandybridgeXiang, Haihao2010-09-211-2/+24
* | drm/i915: Add support for GPU soft reset on Ironlake.Kenneth Graunke2010-09-211-1/+2
* | drm/i915: Rename graphics reset registers.Kenneth Graunke2010-09-211-4/+6
* | drm/i915: use GMBUS to manage i2c linksChris Wilson2010-09-181-6/+45
* | drm/i915: Use macros to switch between equivalent pipe registersChris Wilson2010-09-111-27/+70
* | drm/i915: Tidy Ironlake watermark computationChris Wilson2010-09-111-2/+2
* | drm/i915: enable thermal reporting for IPSJesse Barnes2010-09-111-0/+4
* | Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson2010-09-111-0/+8
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| * drm/i915: don't enable self-refresh on IronlakeJesse Barnes2010-09-101-0/+8
* | drm/i915: Use the real FDI frequency for determining b/wChris Wilson2010-09-101-0/+1
* | drm/i915: fix pipeconf dither bit definitionsJesse Barnes2010-09-081-5/+11
* | drm/i915: Clear scanline waits after disabling the pipe.Chris Wilson2010-09-081-0/+2
* | drm/i915/tv: Preserve reserved DAC bits during mode-settingChris Wilson2010-09-081-0/+1
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* drm/i915: Enable MI_FLUSH on SandybridgeZhenyu Wang2010-09-071-0/+1
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