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path: root/drivers/usb/dwc/Kconfig
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#
# USB Dual Role (OTG-ready) Controller Drivers
# for silicon based on Synopsys DesignWare IP
#

comment "Enable Host or Gadget support for DesignWare OTG controller"
	depends on !USB && USB_GADGET=n

config USB_DWC_OTG
	tristate "Synopsys DWC OTG Controller"
	depends on USB || USB_GADGET
	select NOP_USB_XCEIV
	select USB_OTG_UTILS
	default USB_GADGET
	help
	  This driver provides USB Device Controller support for the
	  Synopsys DesignWare USB OTG Core used on the AppliedMicro PowerPC SoC.

config DWC_DEBUG
	bool "Enable DWC Debugging"
	depends on USB_DWC_OTG
	default n
	help
	  Enable DWC driver debugging

choice
	prompt "DWC Mode Selection"
	depends on USB_DWC_OTG
	default DWC_HOST_ONLY
	help
	  Select the DWC Core in OTG, Host only, or Device only mode.

config DWC_HOST_ONLY
	bool "DWC Host Only Mode"

config DWC_OTG_MODE
	bool "DWC OTG Mode"
	select USB_GADGET_SELECTED

config DWC_DEVICE_ONLY
	bool "DWC Device Only Mode"
	select USB_GADGET_SELECTED

endchoice

# enable peripheral support (including with OTG)
choice
	prompt "DWC DMA/SlaveMode Selection"
	depends on USB_DWC_OTG
	default DWC_DMA_MODE
	help
	  Select the DWC DMA or Slave Mode.
	  DMA mode uses the DWC core internal DMA engines.
	  Slave mode uses the processor PIO to tranfer data.
	  In Slave mode, processor's DMA channels can be used if available.

config DWC_SLAVE
	bool "DWC Slave Mode"

config DWC_DMA_MODE
	bool "DWC DMA Mode"

endchoice

config DWC_OTG_REG_LE
	bool "DWC Little Endian Register"
	depends on USB_DWC_OTG
	default y
	help
	  OTG core register access is Little-Endian.

config DWC_OTG_FIFO_LE
	bool "DWC FIFO Little Endian"
	depends on USB_DWC_OTG
	default y
	help
	  OTG core FIFO access is Little-Endian.

config DWC_LIMITED_XFER_SIZE
	bool "DWC Endpoint Limited Xfer Size"
	depends on USB_GADGET_DWC_HDRC
	default n
	help
	  Bit fields in the Device EP Transfer Size Register is 11 bits.