blob: 14e58de7397357bbc7aa6411426e06bd78775298 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
|
/*
* Common header file for blackfin family of processors.
*
*/
#ifndef _BLACKFIN_H_
#define _BLACKFIN_H_
#include <asm/macros.h>
#include <asm/mach/blackfin.h>
#include <asm/bfin-global.h>
#ifndef __ASSEMBLY__
/* SSYNC implementation for C file */
#if defined(ANOMALY_05000312) && defined(ANOMALY_05000244)
static inline void SSYNC (void)
{
int _tmp;
__asm__ __volatile__ ("cli %0;\n\t"
"nop;nop;\n\t"
"ssync;\n\t"
"sti %0;\n\t"
:"=d"(_tmp):);
}
#elif defined(ANOMALY_05000312) && !defined(ANOMALY_05000244)
static inline void SSYNC (void)
{
int _tmp;
__asm__ __volatile__ ("cli %0;\n\t"
"ssync;\n\t"
"sti %0;\n\t"
:"=d"(_tmp):);
}
#elif !defined(ANOMALY_05000312) && defined(ANOMALY_05000244)
static inline void SSYNC (void)
{
__builtin_bfin_ssync();
}
#elif !defined(ANOMALY_05000312) && !defined(ANOMALY_05000244)
static inline void SSYNC (void)
{
__asm__ __volatile__ ("ssync;\n\t");
}
#endif
/* CSYNC implementation for C file */
#if defined(ANOMALY_05000312) && defined(ANOMALY_05000244)
static inline void CSYNC (void)
{
int _tmp;
__asm__ __volatile__ ("cli %0;\n\t"
"nop;nop;\n\t"
"csync;\n\t"
"sti %0;\n\t"
:"=d"(_tmp):);
}
#elif defined(ANOMALY_05000312) && !defined(ANOMALY_05000244)
static inline void CSYNC (void)
{
int _tmp;
__asm__ __volatile__ ("cli %0;\n\t"
"csync;\n\t"
"sti %0;\n\t"
:"=d"(_tmp):);
}
#elif !defined(ANOMALY_05000312) && defined(ANOMALY_05000244)
static inline void CSYNC (void)
{
__builtin_bfin_csync();
}
#elif !defined(ANOMALY_05000312) && !defined(ANOMALY_05000244)
static inline void CSYNC (void)
{
__asm__ __volatile__ ("csync;\n\t");
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* _BLACKFIN_H_ */
|
