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authorNishanth Menon <nm@ti.com>2012-01-05 12:11:21 -0600
committerRoman Shaposhnikov <x0166637@ti.com>2012-04-17 21:19:28 +0300
commit113b6f0df98531e4be1174c0eca8f72abe5ac77c (patch)
treecfe91725786d9f0768f6a6ab7a0fe305b476333e
parent23b13498e41d2efb5d7d1ac4f60e87df717b7c80 (diff)
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OMAP4460: OPP: update ABB for IVA OPP turbo
On 4460 all OPPs have pre-determined states for VDD_IVA's ABB LDO, except for OPP_TURBO. OPP_TURBO may require bypass or RBB. depending on a characterisation data blown into eFuse register CONTROL_STD_FUSE_OPP_DPLL_1. Bit 21 of that register signify DPLL_IVA trim OPP_TURBO might put IVA's ABB LDO into bypass or RBB based on this value. This patch introduces ABB type detection into the OPP init code. Change-Id: Ie2f49652fda667943a7a9ac76d529c6a594b8755 Signed-off-by: Nishanth Menon <nm@ti.com>
-rw-r--r--arch/arm/mach-omap2/opp4xxx_data.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/opp4xxx_data.c b/arch/arm/mach-omap2/opp4xxx_data.c
index 7443497..325e6f9 100644
--- a/arch/arm/mach-omap2/opp4xxx_data.c
+++ b/arch/arm/mach-omap2/opp4xxx_data.c
@@ -39,6 +39,7 @@
*/
#define OMAP4460_MPU_OPP_DPLL_TRIM BIT(18)
#define OMAP4460_MPU_OPP_DPLL_TURBO_RBB BIT(20)
+#define OMAP4460_IVA_OPP_DPLL_TURBO_RBB BIT(21)
/*
* Structures containing OMAP4430 voltage supported and various
@@ -595,6 +596,23 @@ static void __init omap4460_abb_update(void)
OMAP4460_VDD_MPU_OPPTURBO_UV,
abb_type);
pr_info("%s: MPU OPP Turbo: %s OPP ABB type\n", __func__, abb_msg);
+
+ /*
+ * OMAP4460 IVA OPP Turbo configuration:
+ * if bit 21 is set, enable RBB
+ */
+ rbb = reg & OMAP4460_IVA_OPP_DPLL_TURBO_RBB;
+ if (rbb) {
+ abb_type = OMAP_ABB_SLOW_OPP;
+ abb_msg = "Slow";
+ } else {
+ abb_type = OMAP_ABB_NOMINAL_OPP;
+ abb_msg = "Nominal";
+ }
+ omap4_abb_update(omap446x_vdd_iva_volt_data,
+ OMAP4460_VDD_IVA_OPPTURBO_UV,
+ abb_type);
+ pr_info("%s: IVA OPP Turbo: %s OPP ABB type\n", __func__, abb_msg);
}
/**