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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-08-10 18:08:10 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-09-01 12:06:23 +0100
commit0ba8b9b273c45dd23f60ff700e265a0069b33758 (patch)
treecb6aef90464889a27215cf9b7204c11b12e7c628 /arch/arm/mach-ixp4xx
parentb8e6c91c74e9f0279b7c51048779b3d62da60b88 (diff)
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[ARM] cputype: separate definitions, use them
Add asm/cputype.h, moving functions and definitions from asm/system.h there. Convert all users of 'processor_id' to the more efficient read_cpuid_id() function. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-ixp4xx')
-rw-r--r--arch/arm/mach-ixp4xx/common-pci.c7
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/cpu.h9
2 files changed, 8 insertions, 8 deletions
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c
index 192538a..f74a460 100644
--- a/arch/arm/mach-ixp4xx/common-pci.c
+++ b/arch/arm/mach-ixp4xx/common-pci.c
@@ -27,6 +27,7 @@
#include <linux/device.h>
#include <asm/dma-mapping.h>
+#include <asm/cputype.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/sizes.h>
@@ -366,15 +367,13 @@ void __init ixp4xx_adjust_zones(int node, unsigned long *zone_size,
void __init ixp4xx_pci_preinit(void)
{
- unsigned long processor_id;
-
- asm("mrc p15, 0, %0, cr0, cr0, 0;" : "=r"(processor_id) :);
+ unsigned long cpuid = read_cpuid_id();
/*
* Determine which PCI read method to use.
* Rev 0 IXP425 requires workaround.
*/
- if (!(processor_id & 0xf) && cpu_is_ixp42x()) {
+ if (!(cpuid & 0xf) && cpu_is_ixp42x()) {
printk("PCI: IXP42x A0 silicon detected - "
"PCI Non-Prefetch Workaround Enabled\n");
ixp4xx_pci_read = ixp4xx_pci_read_errata;
diff --git a/arch/arm/mach-ixp4xx/include/mach/cpu.h b/arch/arm/mach-ixp4xx/include/mach/cpu.h
index ff8aa23..51bd69c 100644
--- a/arch/arm/mach-ixp4xx/include/mach/cpu.h
+++ b/arch/arm/mach-ixp4xx/include/mach/cpu.h
@@ -14,18 +14,19 @@
#ifndef __ASM_ARCH_CPU_H__
#define __ASM_ARCH_CPU_H__
-extern unsigned int processor_id;
+#include <asm/cputype.h>
+
/* Processor id value in CP15 Register 0 */
#define IXP425_PROCESSOR_ID_VALUE 0x690541c0
#define IXP435_PROCESSOR_ID_VALUE 0x69054040
#define IXP465_PROCESSOR_ID_VALUE 0x69054200
#define IXP4XX_PROCESSOR_ID_MASK 0xfffffff0
-#define cpu_is_ixp42x() ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == \
+#define cpu_is_ixp42x() ((read_cpuid_id() & IXP4XX_PROCESSOR_ID_MASK) == \
IXP425_PROCESSOR_ID_VALUE)
-#define cpu_is_ixp43x() ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == \
+#define cpu_is_ixp43x() ((read_cpuid_id() & IXP4XX_PROCESSOR_ID_MASK) == \
IXP435_PROCESSOR_ID_VALUE)
-#define cpu_is_ixp46x() ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == \
+#define cpu_is_ixp46x() ((read_cpuid_id() & IXP4XX_PROCESSOR_ID_MASK) == \
IXP465_PROCESSOR_ID_VALUE)
static inline u32 ixp4xx_read_feature_bits(void)