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author | Nicolas Pitre <nico@fluxnic.net> | 2010-10-21 15:48:33 -0400 |
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committer | Nicolas Pitre <nico@fluxnic.net> | 2010-10-21 15:52:03 -0400 |
commit | 3924996bab2845bdf9a9d16ff7c20445de1ab55d (patch) | |
tree | 8d70c64909df1a8d29f7405eea63ccf4adf5385d /arch/arm/mach-kirkwood | |
parent | d3491820e8a65c4a51c8e2a165c6a13f864101ba (diff) | |
download | kernel_samsung_espresso10-3924996bab2845bdf9a9d16ff7c20445de1ab55d.zip kernel_samsung_espresso10-3924996bab2845bdf9a9d16ff7c20445de1ab55d.tar.gz kernel_samsung_espresso10-3924996bab2845bdf9a9d16ff7c20445de1ab55d.tar.bz2 |
[ARM] Kirkwood: restrict the scope of the PCIe reset workaround
Commit 21f0ba90a447 "orion/kirkwood: reset PCIe unit on boot" made the
reset of the PCIe unit unconditional. While this may fix problems on some
targets, this also causes problems on other targets.
Saeed Bishara <saeed@marvell.com> said about the original problem: "We
couln't pinpoint the root cause of this issue, actually we failed to
reproduce that issue."
So let's restrict the reset of the PCIe unit only to the target where
the original problem was observed.
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
Diffstat (limited to 'arch/arm/mach-kirkwood')
-rw-r--r-- | arch/arm/mach-kirkwood/ts41x-setup.c | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/arch/arm/mach-kirkwood/ts41x-setup.c b/arch/arm/mach-kirkwood/ts41x-setup.c index 2e14afe..6995199 100644 --- a/arch/arm/mach-kirkwood/ts41x-setup.c +++ b/arch/arm/mach-kirkwood/ts41x-setup.c @@ -27,6 +27,10 @@ #include "mpp.h" #include "tsx1x-common.h" +/* for the PCIe reset workaround */ +#include <plat/pcie.h> + + #define QNAP_TS41X_JUMPER_JP1 45 static struct i2c_board_info __initdata qnap_ts41x_i2c_rtc = { @@ -140,8 +144,16 @@ static void __init qnap_ts41x_init(void) static int __init ts41x_pci_init(void) { - if (machine_is_ts41x()) + if (machine_is_ts41x()) { + /* + * Without this explicit reset, the PCIe SATA controller + * (Marvell 88sx7042/sata_mv) is known to stop working + * after a few minutes. + */ + orion_pcie_reset((void __iomem *)PCIE_VIRT_BASE); + kirkwood_pcie_init(KW_PCIE0); + } return 0; } |