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authorJarkko Nikula <jarkko.nikula@nokia.com>2006-06-26 16:16:11 -0700
committerTony Lindgren <tony@atomide.com>2006-06-26 16:16:11 -0700
commit6e711ec6d249c0d3f8bc225066738d064ed90032 (patch)
tree21e8c8e704eac0f2ccf4d00045aaa82546be4661 /arch/arm/mach-omap2
parented7eb9d90a24bbe93fa47e19b61528bd5cfe584c (diff)
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ARM: OMAP: Correct two bugs in arch/arm/mach-omap2/clock.c
omap2_clk_set_rate: dif_off must use clk->rate_offset, not clk->src_off. omap2_get_src_field: for the case CM_SYSCLKOUT_SEL1, val must be 2 for 96MHz and 3 for 54MHz. Signed-off-by: Jarkko Nikula <jarkko.nikula@nokia.com> Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r--arch/arm/mach-omap2/clock.c35
1 files changed, 22 insertions, 13 deletions
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 72eb4bf..242d8f9 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -660,26 +660,35 @@ static int omap2_clk_set_rate(struct clk *clk, unsigned long rate)
/* Isolate control register */
div_sel = (SRC_RATE_SEL_MASK & clk->flags);
- div_off = clk->src_offset;
+ div_off = clk->rate_offset;
validrate = omap2_clksel_round_rate(clk, rate, &new_div);
- if(validrate != rate)
+ if (validrate != rate)
return(ret);
field_val = omap2_get_clksel(&div_sel, &field_mask, clk);
if (div_sel == 0)
return ret;
- if(clk->flags & CM_SYSCLKOUT_SEL1){
- switch(new_div){
- case 16: field_val = 4; break;
- case 8: field_val = 3; break;
- case 4: field_val = 2; break;
- case 2: field_val = 1; break;
- case 1: field_val = 0; break;
+ if (clk->flags & CM_SYSCLKOUT_SEL1) {
+ switch (new_div) {
+ case 16:
+ field_val = 4;
+ break;
+ case 8:
+ field_val = 3;
+ break;
+ case 4:
+ field_val = 2;
+ break;
+ case 2:
+ field_val = 1;
+ break;
+ case 1:
+ field_val = 0;
+ break;
}
- }
- else
+ } else
field_val = new_div;
reg = (void __iomem *)div_sel;
@@ -784,9 +793,9 @@ static u32 omap2_get_src_field(u32 *type_to_addr, u32 reg_offset,
val = 0;
if (src_clk == &sys_ck)
val = 1;
- if (src_clk == &func_54m_ck)
- val = 2;
if (src_clk == &func_96m_ck)
+ val = 2;
+ if (src_clk == &func_54m_ck)
val = 3;
break;
}