diff options
| author | Mark Maule <maule@sgi.com> | 2005-11-07 15:48:50 -0600 |
|---|---|---|
| committer | Tony Luck <tony.luck@intel.com> | 2005-11-08 10:07:09 -0800 |
| commit | 6fb93a92ec2a012fa525499c330522bbb8c18d80 (patch) | |
| tree | b64e157335242a8d257fb9d24fe6f09b8f4c99f6 /arch/ia64 | |
| parent | cbb921443424fb8019e52bae83e442d01f7715ef (diff) | |
| download | kernel_samsung_espresso10-6fb93a92ec2a012fa525499c330522bbb8c18d80.zip kernel_samsung_espresso10-6fb93a92ec2a012fa525499c330522bbb8c18d80.tar.gz kernel_samsung_espresso10-6fb93a92ec2a012fa525499c330522bbb8c18d80.tar.bz2 | |
[IA64] altix: misc pci interrupt related fixes
Fix a couple of altix interrupt related bugs.
Signed-off-by: Mark Maule <maule@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64')
| -rw-r--r-- | arch/ia64/sn/pci/pcibr/pcibr_provider.c | 4 | ||||
| -rw-r--r-- | arch/ia64/sn/pci/pcibr/pcibr_reg.c | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_provider.c b/arch/ia64/sn/pci/pcibr/pcibr_provider.c index 7b03b80..1f500c8 100644 --- a/arch/ia64/sn/pci/pcibr/pcibr_provider.c +++ b/arch/ia64/sn/pci/pcibr/pcibr_provider.c @@ -212,13 +212,13 @@ void pcibr_target_interrupt(struct sn_irq_info *sn_irq_info) pdi_pcibus_info; /* Disable the device's IRQ */ - pcireg_intr_enable_bit_clr(pcibus_info, bit); + pcireg_intr_enable_bit_clr(pcibus_info, (1 << bit)); /* Change the device's IRQ */ pcireg_intr_addr_addr_set(pcibus_info, bit, xtalk_addr); /* Re-enable the device's IRQ */ - pcireg_intr_enable_bit_set(pcibus_info, bit); + pcireg_intr_enable_bit_set(pcibus_info, (1 << bit)); pcibr_force_interrupt(sn_irq_info); } diff --git a/arch/ia64/sn/pci/pcibr/pcibr_reg.c b/arch/ia64/sn/pci/pcibr/pcibr_reg.c index 4f718c3..5d53409 100644 --- a/arch/ia64/sn/pci/pcibr/pcibr_reg.c +++ b/arch/ia64/sn/pci/pcibr/pcibr_reg.c @@ -131,7 +131,7 @@ void pcireg_intr_enable_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits) __sn_clrq_relaxed(&ptr->tio.cp_int_enable, bits); break; case PCIBR_BRIDGETYPE_PIC: - __sn_clrq_relaxed(&ptr->pic.p_int_enable, ~bits); + __sn_clrq_relaxed(&ptr->pic.p_int_enable, bits); break; default: panic |