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author | John Stultz <johnstul@us.ibm.com> | 2010-03-03 19:57:25 -0800 |
---|---|---|
committer | Thomas Gleixner <tglx@linutronix.de> | 2010-03-13 01:14:12 +0100 |
commit | 944694716d6ea3c274a73c830bf33e194bad4bcd (patch) | |
tree | 3d89f85a95148eabdf99ab1000247bb7a7cc2019 /arch/m32r | |
parent | cb0e996378900fa05d5c779d6bfa52d55ebc3407 (diff) | |
download | kernel_samsung_espresso10-944694716d6ea3c274a73c830bf33e194bad4bcd.zip kernel_samsung_espresso10-944694716d6ea3c274a73c830bf33e194bad4bcd.tar.gz kernel_samsung_espresso10-944694716d6ea3c274a73c830bf33e194bad4bcd.tar.bz2 |
m32r: Convert m32r to use read/update_peristent_clock
This patch converts the m32r architecture to use the generic
read_persistent_clock and update_persistent_clock interfaces, reducing
the amount of arch specific code we have to maintain, and allowing for
further cleanups in the future.
I have not built or tested this patch, so help from arch maintainers
would be appreciated.
Signed-off-by: John Stultz <johnstul@us.ibm.com>
Cc: Hirokazu Takata <takata@linux-m32r.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
LKML-Reference: <1267675049-12337-11-git-send-email-johnstul@us.ibm.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/m32r')
-rw-r--r-- | arch/m32r/kernel/time.c | 47 |
1 files changed, 7 insertions, 40 deletions
diff --git a/arch/m32r/kernel/time.c b/arch/m32r/kernel/time.c index 9cedcef..bda8682 100644 --- a/arch/m32r/kernel/time.c +++ b/arch/m32r/kernel/time.c @@ -106,24 +106,6 @@ u32 arch_gettimeoffset(void) } /* - * In order to set the CMOS clock precisely, set_rtc_mmss has to be - * called 500 ms after the second nowtime has started, because when - * nowtime is written into the registers of the CMOS clock, it will - * jump to the next second precisely 500 ms later. Check the Motorola - * MC146818A or Dallas DS12887 data sheet for details. - * - * BUG: This routine does not handle hour overflow properly; it just - * sets the minutes. Usually you won't notice until after reboot! - */ -static inline int set_rtc_mmss(unsigned long nowtime) -{ - return 0; -} - -/* last time the cmos clock got updated */ -static long last_rtc_update = 0; - -/* * timer_interrupt() needs to keep up the real-time clock, * as well as call the "do_timer()" routine every clocktick */ @@ -138,23 +120,6 @@ static irqreturn_t timer_interrupt(int irq, void *dev_id) #ifndef CONFIG_SMP update_process_times(user_mode(get_irq_regs())); #endif - /* - * If we have an externally synchronized Linux clock, then update - * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be - * called as close as possible to 500 ms before the new second starts. - */ - write_seqlock(&xtime_lock); - if (ntp_synced() - && xtime.tv_sec > last_rtc_update + 660 - && (xtime.tv_nsec / 1000) >= 500000 - ((unsigned)TICK_SIZE) / 2 - && (xtime.tv_nsec / 1000) <= 500000 + ((unsigned)TICK_SIZE) / 2) - { - if (set_rtc_mmss(xtime.tv_sec) == 0) - last_rtc_update = xtime.tv_sec; - else /* do it again in 60 s */ - last_rtc_update = xtime.tv_sec - 600; - } - write_sequnlock(&xtime_lock); /* As we return to user mode fire off the other CPU schedulers.. this is basically because we don't yet share IRQ's around. This message is rigged to be safe on the 386 - basically it's @@ -174,7 +139,7 @@ static struct irqaction irq0 = { .name = "MFT2", }; -void __init time_init(void) +void read_persistent_clock(struct timespec *ts) { unsigned int epoch, year, mon, day, hour, min, sec; @@ -194,11 +159,13 @@ void __init time_init(void) epoch = 1952; year += epoch; - xtime.tv_sec = mktime(year, mon, day, hour, min, sec); - xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ); - set_normalized_timespec(&wall_to_monotonic, - -xtime.tv_sec, -xtime.tv_nsec); + ts->tv_sec = mktime(year, mon, day, hour, min, sec); + ts->tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ); +} + +void __init time_init(void) +{ #if defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_XNUX2) \ || defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_M32700) \ || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104) |