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author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2006-11-14 01:13:18 +0900 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2006-11-30 01:14:46 +0000 |
commit | 1417836e81c0ab8f5a0bfeafa90d3eaa41b2a067 (patch) | |
tree | 0274893cb78ca2e1bb85c3eee0c07a85e0b83d04 /arch/mips/kernel/irq_cpu.c | |
parent | 1603b5aca4f15b34848fb5594d0c7b6333b99144 (diff) | |
download | kernel_samsung_espresso10-1417836e81c0ab8f5a0bfeafa90d3eaa41b2a067.zip kernel_samsung_espresso10-1417836e81c0ab8f5a0bfeafa90d3eaa41b2a067.tar.gz kernel_samsung_espresso10-1417836e81c0ab8f5a0bfeafa90d3eaa41b2a067.tar.bz2 |
[MIPS] use generic_handle_irq, handle_level_irq, handle_percpu_irq
Further incorporation of generic irq framework. Replacing __do_IRQ()
by proper flow handler would make the irq handling path a bit simpler
and faster.
* use generic_handle_irq() instead of __do_IRQ().
* use handle_level_irq for obvious level-type irq chips.
* use handle_percpu_irq for irqs marked as IRQ_PER_CPU.
* setup .eoi routine for irq chips possibly used with handle_percpu_irq.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/irq_cpu.c')
-rw-r--r-- | arch/mips/kernel/irq_cpu.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c index 3b7cfa4..be5ac23 100644 --- a/arch/mips/kernel/irq_cpu.c +++ b/arch/mips/kernel/irq_cpu.c @@ -62,6 +62,7 @@ static struct irq_chip mips_cpu_irq_controller = { .mask = mask_mips_irq, .mask_ack = mask_mips_irq, .unmask = unmask_mips_irq, + .eoi = unmask_mips_irq, .end = mips_cpu_irq_end, }; @@ -104,6 +105,7 @@ static struct irq_chip mips_mt_cpu_irq_controller = { .mask = mask_mips_mt_irq, .mask_ack = mips_mt_cpu_irq_ack, .unmask = unmask_mips_mt_irq, + .eoi = unmask_mips_mt_irq, .end = mips_mt_cpu_irq_end, }; @@ -124,7 +126,8 @@ void __init mips_cpu_irq_init(int irq_base) set_irq_chip(i, &mips_mt_cpu_irq_controller); for (i = irq_base + 2; i < irq_base + 8; i++) - set_irq_chip(i, &mips_cpu_irq_controller); + set_irq_chip_and_handler(i, &mips_cpu_irq_controller, + handle_level_irq); mips_cpu_irq_base = irq_base; } |