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| author | Chandrakala Chavva <cchavva@caviumnetworks.com> | 2010-07-26 18:14:16 -0700 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2010-08-05 13:26:27 +0100 |
| commit | 52a0f00b50ea360e3cf7e3281523c6a8aafc5761 (patch) | |
| tree | 5824f0ebbb4986f1171574dabe6ee2b849f72f9a /arch/mips/pci | |
| parent | 1aa2b2782a056b9bb0a19fae5a04624d8dcd8379 (diff) | |
| download | kernel_samsung_espresso10-52a0f00b50ea360e3cf7e3281523c6a8aafc5761.zip kernel_samsung_espresso10-52a0f00b50ea360e3cf7e3281523c6a8aafc5761.tar.gz kernel_samsung_espresso10-52a0f00b50ea360e3cf7e3281523c6a8aafc5761.tar.bz2 | |
MIPS: Octeon: Disallow MSI-X interrupt and fall back to MSI interrupts.
MSI-X interrupts are not supported yet for Octeon, return error if
MSI-X interrupts are requested by driver so that the driver will fall
back to use MSI interrupts.
Signed-off-by: Chandrakala Chavva <cchavva@caviumnetworks.com>
To: linux-mips@linux-mips.org
Cc: David Daney <ddaney@caviumnetworks.com>
Patchwork: https://patchwork.linux-mips.org/patch/1506/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Diffstat (limited to 'arch/mips/pci')
| -rw-r--r-- | arch/mips/pci/msi-octeon.c | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/mips/pci/msi-octeon.c b/arch/mips/pci/msi-octeon.c index 7c75640..d808049 100644 --- a/arch/mips/pci/msi-octeon.c +++ b/arch/mips/pci/msi-octeon.c @@ -177,6 +177,34 @@ msi_irq_allocated: return 0; } +int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) +{ + struct msi_desc *entry; + int ret; + + /* + * MSI-X is not supported. + */ + if (type == PCI_CAP_ID_MSIX) + return -EINVAL; + + /* + * If an architecture wants to support multiple MSI, it needs to + * override arch_setup_msi_irqs() + */ + if (type == PCI_CAP_ID_MSI && nvec > 1) + return 1; + + list_for_each_entry(entry, &dev->msi_list, list) { + ret = arch_setup_msi_irq(dev, entry); + if (ret < 0) + return ret; + if (ret > 0) + return -ENOSPC; + } + + return 0; +} /** * Called when a device no longer needs its MSI interrupts. All |