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| author | FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> | 2010-08-10 18:03:22 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-08-11 08:59:21 -0700 |
| commit | 4565f0170dfc849b3629c27d769db800467baa62 (patch) | |
| tree | a2c70fb6f2f4826749b704ed83557623ca95bca5 /arch/powerpc/include | |
| parent | a6eb9fe105d5de0053b261148cee56c94b4720ca (diff) | |
| download | kernel_samsung_espresso10-4565f0170dfc849b3629c27d769db800467baa62.zip kernel_samsung_espresso10-4565f0170dfc849b3629c27d769db800467baa62.tar.gz kernel_samsung_espresso10-4565f0170dfc849b3629c27d769db800467baa62.tar.bz2 | |
dma-mapping: unify dma_get_cache_alignment implementations
dma_get_cache_alignment returns the minimum DMA alignment. Architectures
defines it as ARCH_DMA_MINALIGN (formally ARCH_KMALLOC_MINALIGN). So we
can unify dma_get_cache_alignment implementations.
Note that some architectures implement dma_get_cache_alignment wrongly.
dma_get_cache_alignment() should return the minimum DMA alignment. So
fully-coherent architectures should return 1. This patch also fixes this
issue.
Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Cc: <linux-arch@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/powerpc/include')
| -rw-r--r-- | arch/powerpc/include/asm/dma-mapping.h | 15 |
1 files changed, 0 insertions, 15 deletions
diff --git a/arch/powerpc/include/asm/dma-mapping.h b/arch/powerpc/include/asm/dma-mapping.h index c85ef23..a77ba28 100644 --- a/arch/powerpc/include/asm/dma-mapping.h +++ b/arch/powerpc/include/asm/dma-mapping.h @@ -215,21 +215,6 @@ static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr) #define dma_is_consistent(d, h) (1) #endif -static inline int dma_get_cache_alignment(void) -{ -#ifdef CONFIG_PPC64 - /* no easy way to get cache size on all processors, so return - * the maximum possible, to be safe */ - return (1 << INTERNODE_CACHE_SHIFT); -#else - /* - * Each processor family will define its own L1_CACHE_SHIFT, - * L1_CACHE_BYTES wraps to this, so this is always safe. - */ - return L1_CACHE_BYTES; -#endif -} - static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size, enum dma_data_direction direction) { |