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author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-04-02 13:34:00 -0700 |
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committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-04-02 13:34:00 -0700 |
commit | 1810b6cb162e0c19e0ecbbacbcfd66f578f335ec (patch) | |
tree | 810494ca945483bf669a062d445d49d3bfb7d6a7 /include/asm-arm/arch-omap/mcbsp.h | |
parent | ef7a4567dc542d8cc563755478464ea928fede41 (diff) | |
parent | 9b6553cd01ce3ea7a6a532f7b7e62e3535d6b102 (diff) | |
download | kernel_samsung_espresso10-1810b6cb162e0c19e0ecbbacbcfd66f578f335ec.zip kernel_samsung_espresso10-1810b6cb162e0c19e0ecbbacbcfd66f578f335ec.tar.gz kernel_samsung_espresso10-1810b6cb162e0c19e0ecbbacbcfd66f578f335ec.tar.bz2 |
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: (27 commits)
[ARM] 3433/1: ARM: OMAP: 8/8 Update board files
[ARM] 3455/1: ARM: OMAP: 7/8 Misc updates, take 2
[ARM] 3454/1: ARM: OMAP: 6/8 Update framebuffer low-level init code, take 2
[ARM] 3430/1: ARM: OMAP: 5/8 Update PM
[ARM] 3429/1: ARM: OMAP: 4/8 Update GPIO
[ARM] 3428/1: ARM: OMAP: 3/8 Update pin multiplexing
[ARM] 3427/1: ARM: OMAP: 2/8 Update timers
[ARM] 3426/1: ARM: OMAP: 1/8 Update clock framework
[ARM] 3396/2: AT91RM9200 Platform devices update
[ARM] 3395/2: AT91RM9200 Dataflash Card vs MMC selection
[ARM] 3393/2: AT91RM9200 LED support
[ARM] 3453/1: Poodle: Correctly set the memory size
[ARM] 3446/1: i.MX: MMC/SD SDHC controller registration for i.MX/MX1 MX1ADS board
[ARM] 3444/1: i.MX: Scatter-gather DMA emulation for i.MX/MX1
[ARM] 3451/1: ep93xx: use the m48t86 rtc driver on the ts72xx platform
[ARM] 3450/1: ep93xx: use the ep93xx rtc driver
[ARM] 3452/1: [S3C2410] RX3715 - add nand information
[ARM] 3449/1: [S3C2410] Anubis - fix NAND timings
[ARM] 3448/1: [S3C2410] Settle delay when _enabling_ USB PLL
[ARM] 3442/1: [S3C2410] SMDK: NAND device setup
...
Diffstat (limited to 'include/asm-arm/arch-omap/mcbsp.h')
-rw-r--r-- | include/asm-arm/arch-omap/mcbsp.h | 65 |
1 files changed, 65 insertions, 0 deletions
diff --git a/include/asm-arm/arch-omap/mcbsp.h b/include/asm-arm/arch-omap/mcbsp.h index e79d98a..ed0dde4 100644 --- a/include/asm-arm/arch-omap/mcbsp.h +++ b/include/asm-arm/arch-omap/mcbsp.h @@ -37,6 +37,11 @@ #define OMAP1610_MCBSP2_BASE 0xfffb1000 #define OMAP1610_MCBSP3_BASE 0xe1017000 +#define OMAP24XX_MCBSP1_BASE 0x48074000 +#define OMAP24XX_MCBSP2_BASE 0x48076000 + +#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP730) + #define OMAP_MCBSP_REG_DRR2 0x00 #define OMAP_MCBSP_REG_DRR1 0x02 #define OMAP_MCBSP_REG_DXR2 0x04 @@ -71,9 +76,62 @@ #define OMAP_MAX_MCBSP_COUNT 3 +#define AUDIO_MCBSP_DATAWRITE (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1) +#define AUDIO_MCBSP_DATAREAD (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DRR1) + +#define AUDIO_MCBSP OMAP_MCBSP1 +#define AUDIO_DMA_TX OMAP_DMA_MCBSP1_TX +#define AUDIO_DMA_RX OMAP_DMA_MCBSP1_RX + +#elif defined(CONFIG_ARCH_OMAP24XX) + +#define OMAP_MCBSP_REG_DRR2 0x00 +#define OMAP_MCBSP_REG_DRR1 0x04 +#define OMAP_MCBSP_REG_DXR2 0x08 +#define OMAP_MCBSP_REG_DXR1 0x0C +#define OMAP_MCBSP_REG_SPCR2 0x10 +#define OMAP_MCBSP_REG_SPCR1 0x14 +#define OMAP_MCBSP_REG_RCR2 0x18 +#define OMAP_MCBSP_REG_RCR1 0x1C +#define OMAP_MCBSP_REG_XCR2 0x20 +#define OMAP_MCBSP_REG_XCR1 0x24 +#define OMAP_MCBSP_REG_SRGR2 0x28 +#define OMAP_MCBSP_REG_SRGR1 0x2C +#define OMAP_MCBSP_REG_MCR2 0x30 +#define OMAP_MCBSP_REG_MCR1 0x34 +#define OMAP_MCBSP_REG_RCERA 0x38 +#define OMAP_MCBSP_REG_RCERB 0x3C +#define OMAP_MCBSP_REG_XCERA 0x40 +#define OMAP_MCBSP_REG_XCERB 0x44 +#define OMAP_MCBSP_REG_PCR0 0x48 +#define OMAP_MCBSP_REG_RCERC 0x4C +#define OMAP_MCBSP_REG_RCERD 0x50 +#define OMAP_MCBSP_REG_XCERC 0x54 +#define OMAP_MCBSP_REG_XCERD 0x58 +#define OMAP_MCBSP_REG_RCERE 0x5C +#define OMAP_MCBSP_REG_RCERF 0x60 +#define OMAP_MCBSP_REG_XCERE 0x64 +#define OMAP_MCBSP_REG_XCERF 0x68 +#define OMAP_MCBSP_REG_RCERG 0x6C +#define OMAP_MCBSP_REG_RCERH 0x70 +#define OMAP_MCBSP_REG_XCERG 0x74 +#define OMAP_MCBSP_REG_XCERH 0x78 + +#define OMAP_MAX_MCBSP_COUNT 2 + +#define AUDIO_MCBSP_DATAWRITE (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR1) +#define AUDIO_MCBSP_DATAREAD (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR1) + +#define AUDIO_MCBSP OMAP_MCBSP2 +#define AUDIO_DMA_TX OMAP24XX_DMA_MCBSP2_TX +#define AUDIO_DMA_RX OMAP24XX_DMA_MCBSP2_RX + +#endif + #define OMAP_MCBSP_READ(base, reg) __raw_readw((base) + OMAP_MCBSP_REG_##reg) #define OMAP_MCBSP_WRITE(base, reg, val) __raw_writew((val), (base) + OMAP_MCBSP_REG_##reg) + /************************** McBSP SPCR1 bit definitions ***********************/ #define RRST 0x0001 #define RRDY 0x0002 @@ -195,6 +253,10 @@ typedef enum { OMAP_MCBSP3, } omap_mcbsp_id; +typedef int __bitwise omap_mcbsp_io_type_t; +#define OMAP_MCBSP_IRQ_IO ((__force omap_mcbsp_io_type_t) 1) +#define OMAP_MCBSP_POLL_IO ((__force omap_mcbsp_io_type_t) 2) + typedef enum { OMAP_MCBSP_WORD_8 = 0, OMAP_MCBSP_WORD_12, @@ -246,6 +308,9 @@ u32 omap_mcbsp_recv_word(unsigned int id); int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, unsigned int length); int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, unsigned int length); +int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word); +int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 * word); + /* SPI specific API */ void omap_mcbsp_set_spi_mode(unsigned int id, const struct omap_mcbsp_spi_cfg * spi_cfg); |