ASoC: sdp4430: Control CDC CLK2 based on TWL6040 power mode

TWL6040 requires MCLK to be active as long as high-performance
mode is in use, as glitch-free mux cannot tolerate MCLK gating.
TWL6040 doesn't require MCLK for low-power mode as it uses 32k
clock. SDP4430 machine driver can control CDC CLK2 request by
driving it through internal request and controlling internal
request value depending on power-mode.

Change-Id: I7314bc35c2811a5a3d94b6317778bc05f807e755
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>

2 files changed, 32 insertions, 0 deletions

diff --git a/sound/soc/omap/Kconfig b/sound/soc/omap/Kconfig
index c2d7ff3..e2958e4 100644
--- a/sound/soc/omap/Kconfig
+++ b/sound/soc/omap/Kconfig
@@ -124,6 +124,7 @@ config SND_OMAP_SOC_SDP4430
 	select SND_OMAP_SOC_DMIC
 	select SND_OMAP_SOC_ABE_DSP
 	select SND_OMAP_SOC_VXREC
+	select CDC_TCXO if (MACH_OMAP_4430SDP || MACH_OMAP4_TABLET)
 	help
 	  Say Y if you want to add support for SoC audio on Texas Instruments
 	  SDP4430 or PandaBoard.
diff --git a/sound/soc/omap/sdp4430.c b/sound/soc/omap/sdp4430.c
index 7e7138d..2689514 100755
--- a/sound/soc/omap/sdp4430.c
+++ b/sound/soc/omap/sdp4430.c
@@ -25,6 +25,7 @@
 #include <linux/i2c.h>
 #include <linux/i2c/twl.h>
 #include <linux/regulator/consumer.h>
+#include <linux/cdc_tcxo.h>
 #include <sound/core.h>
 #include <sound/pcm.h>
 #include <sound/pcm_params.h>
@@ -151,6 +152,17 @@ static int sdp4430_mcpdm_startup(struct snd_pcm_substream *substream)
 	if (twl6040_power_mode) {
 		clk_id = TWL6040_HPPLL_ID;
 		freq = 38400000;
+
+		/*
+		 * TWL6040 requires MCLK to be active as long as
+		 * high-performance mode is in use. Glitch-free mux
+		 * cannot tolerate MCLK gating
+		 */
+		ret = cdc_tcxo_set_req_int(CDC_TCXO_CLK2, 1);
+		if (ret) {
+			printk(KERN_ERR "failed to enable twl6040 MCLK\n");
+			goto err;
+		}
 	} else {
 		clk_id = TWL6040_LPPLL_ID;
 		freq = 32768;
@@ -164,6 +176,13 @@ static int sdp4430_mcpdm_startup(struct snd_pcm_substream *substream)
 		goto err;
 	}
 
+	/* low-power mode uses 32k clock, MCLK is not required */
+	if (!twl6040_power_mode) {
+		ret = cdc_tcxo_set_req_int(CDC_TCXO_CLK2, 0);
+		if (ret)
+			printk(KERN_ERR "failed to disable twl6040 MCLK\n");
+	}
+
 	return 0;
 
 err:
@@ -1110,6 +1129,16 @@ static int __init sdp4430_soc_init(void)
 		goto err_dev;
 	}
 
+	/* Default mode is low-power, MCLK not required */
+	twl6040_power_mode = 0;
+	cdc_tcxo_set_req_int(CDC_TCXO_CLK2, 0);
+
+	/*
+	 * CDC CLK2 supplies TWL6040 MCLK, drive it from REQ2INT to
+	 * have full control of MCLK gating
+	 */
+	cdc_tcxo_set_req_prio(CDC_TCXO_CLK2, CDC_TCXO_PRIO_REQINT);
+
 	return ret;
 
 err_dev:
@@ -1123,6 +1152,8 @@ module_init(sdp4430_soc_init);
 static void __exit sdp4430_soc_exit(void)
 {
 	regulator_put(av_switch_reg);
+	cdc_tcxo_set_req_int(CDC_TCXO_CLK2, 0);
+	cdc_tcxo_set_req_prio(CDC_TCXO_CLK2, CDC_TCXO_PRIO_REQINT);
 	platform_device_unregister(sdp4430_snd_device);
 	snd_soc_unregister_dais(&sdp4430_snd_device->dev, ARRAY_SIZE(dai));
 }