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* Add support for SB1A CPU.Andrew Isaacson2005-10-292-0/+4
* Sibyte fixesAndrew Isaacson2005-10-291-1/+1
* Get 64-bit right in the kgdb stub.Ralf Baechle2005-10-291-3/+2
* Sys_lookup_dcookie arguments occupy 4 argument slots.Ralf Baechle2005-10-291-1/+1
* FPU emulator garbage collection.Ralf Baechle2005-10-291-3/+3
* Don't print file name and line in die and die_if_kernel.Ralf Baechle2005-10-291-14/+2
* Date: Fri Jan 14 03:03:23 2005 +0000Ralf Baechle2005-10-291-1/+1
* Fixup a few lose ends in explicit support for MIPS R1/R2.Ralf Baechle2005-10-293-4/+4
* Protect manipulation of c0_status against preemption and multithreading.Ralf Baechle2005-10-292-12/+47
* Detect 4KSD and treat it like 4KSc.Ralf Baechle2005-10-291-0/+1
* Define and initialize kdb_lock using DEFINE_SPINLOCK.Ralf Baechle2005-10-291-6/+8
* Make kgdb_wait static.Ralf Baechle2005-10-291-1/+1
* Cleanup the mess in cpu_cache_init.Ralf Baechle2005-10-291-7/+18
* Support for MIPSsim, the cycle accurate MIPS simulator.Ralf Baechle2005-10-291-1/+1
* Switch Sibyte profiling driver to ->compat_ioctlRalf Baechle2005-10-291-6/+0
* Revise MIPS 64-bit ptrace interfaceDaniel Jacobowitz2005-10-293-1/+211
* Fix excessive signal latencies.Ralf Baechle2005-10-291-1/+1
* Move genrtc.c's functions into <asm/rtc.h>Ralf Baechle2005-10-292-66/+0
* Virtual SMP support for the 34K.Ralf Baechle2005-10-295-7/+391
* MT bulletproofing.Ralf Baechle2005-10-292-14/+75
* Display presence of SmartMIPS, DSP and MT ASEs in /proc/cpuinfo.Ralf Baechle2005-10-291-2/+5
* Delete old junk.Ralf Baechle2005-10-291-1/+0
* Spelling fix.Ralf Baechle2005-10-291-1/+1
* Inlining will result in back-to-back mtc0 mfc0 instructions. Break theRalf Baechle2005-10-291-0/+2
* sys is only used for native o32 ...Ralf Baechle2005-10-291-3/+3
* R4600 has 32 FPRs.Thiemo Seufer2005-10-291-1/+2
* Make sure that the processor is actually online or die spectacularly.Ralf Baechle2005-10-291-0/+5
* Avoid SMP cacheflushes. This is a minor optimization of startup butRalf Baechle2005-10-291-0/+2
* Philips PNX8550 support: MIPS32-like core with 2 Trimedias on it.Pete Popov2005-10-293-1/+24
* More AP / SP bits for the 34K, the Malta bits and things. Still wantsRalf Baechle2005-10-296-17/+1890
* Move Origin crapola into a machine-specific header file.Ralf Baechle2005-10-291-37/+6
* Prevent gcc from optimizing a few functions away completly.Ralf Baechle2005-10-291-2/+2
* Detect the MIPS R2 vectored interrupt, external interrupt controllerRalf Baechle2005-10-291-0/+6
* New kernel option nowait allows disabling the use of the wait instruction.Ralf Baechle2005-10-291-0/+16
* Use an irq_enable_hazard hazard barrier in unmask_mips_irq. ThisRalf Baechle2005-10-291-0/+2
* Add inotify syscalls for MIPS.Ralf Baechle2005-10-294-1/+12
* Mark a few variables __read_mostly.Ralf Baechle2005-10-292-7/+11
* Detect the 34K.Ralf Baechle2005-10-292-0/+6
* Setup_frame is now returning a success value.Ralf Baechle2005-10-294-25/+32
* Temporary hack for Qemu and MIPSsim until they get a proper ELF loader.Ralf Baechle2005-10-291-0/+12
* Rename CONFIG_CPU_MIPS{32,64} to CONFIG_CPU_MIPS{32|64}_R1.Ralf Baechle2005-10-293-4/+4
* Avoid defining variables in the middle of a block which breaks olderRalf Baechle2005-10-291-4/+10
* Always use ".set mips3" rather than select between "mips2" or "mips3"Maciej W. Rozycki2005-10-291-2/+2
* Use correct names for bits in the R3k cp0.status register.Maciej W. Rozycki2005-10-291-26/+41
* Mark __die() "noreturn" for real.Maciej W. Rozycki2005-10-291-2/+3
* Redo RM9000 workaround which along with other DSP ASE changes wasRalf Baechle2005-10-294-57/+84
* Enable a suitable ISA for the assembler around ll/sc so that codeMaciej W. Rozycki2005-10-291-4/+8
* For MIPS32/MIPS64 cp0.config.mt == 1 implies a standard (R4k-style)Maciej W. Rozycki2005-10-291-5/+1
* Support the MIPS32 / MIPS64 DSP ASE.Ralf Baechle2005-10-2914-82/+308
* 64-bit fixes for Alchemy code ;)Ralf Baechle2005-10-291-6/+5
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