aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/serial/cpm_uart/cpm_uart_cpm2.h
blob: a663300d3476b4222d441e8d648ef63b6f86b017 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
/*
 * linux/drivers/serial/cpm_uart_cpm2.h
 *
 * Driver for CPM (SCC/SMC) serial ports
 * 
 * definitions for cpm2
 *
 */

#ifndef CPM_UART_CPM2_H
#define CPM_UART_CPM2_H

#include <asm/cpm2.h>

/* defines for IRQs */
#define SMC1_IRQ	SIU_INT_SMC1
#define SMC2_IRQ	SIU_INT_SMC2
#define SCC1_IRQ	SIU_INT_SCC1
#define SCC2_IRQ	SIU_INT_SCC2
#define SCC3_IRQ	SIU_INT_SCC3
#define SCC4_IRQ	SIU_INT_SCC4

/* the CPM address */
#define CPM_ADDR	CPM_MAP_ADDR

static inline void cpm_set_brg(int brg, int baud)
{
	cpm_setbrg(brg, baud);
}

static inline void cpm_set_scc_fcr(volatile scc_uart_t * sup)
{
	sup->scc_genscc.scc_rfcr = CPMFCR_GBL | CPMFCR_EB;
	sup->scc_genscc.scc_tfcr = CPMFCR_GBL | CPMFCR_EB;
}

static inline void cpm_set_smc_fcr(volatile smc_uart_t * up)
{
	up->smc_rfcr = CPMFCR_GBL | CPMFCR_EB;
	up->smc_tfcr = CPMFCR_GBL | CPMFCR_EB;
}

#define DPRAM_BASE	((unsigned char *)cpm_dpram_addr(0))

#endif