blob: eee83cbdf2b08c7a22644255b153a8fcace0ec5e (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
|
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 1996, 99, 2003 by Ralf Baechle
*/
#ifndef _ASM_BYTEORDER_H
#define _ASM_BYTEORDER_H
#include <linux/compiler.h>
#include <asm/types.h>
#ifdef __GNUC__
#ifdef CONFIG_CPU_MIPSR2
static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x)
{
__asm__(
" wsbh %0, %1 \n"
: "=r" (x)
: "r" (x));
return x;
}
#define __arch__swab16(x) ___arch__swab16(x)
static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x)
{
__asm__(
" wsbh %0, %1 \n"
" rotr %0, %0, 16 \n"
: "=r" (x)
: "r" (x));
return x;
}
#define __arch__swab32(x) ___arch__swab32(x)
#ifdef CONFIG_CPU_MIPS64_R2
static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x)
{
__asm__(
" dsbh %0, %1 \n"
" dshd %0, %0 \n"
" drotr %0, %0, 32 \n"
: "=r" (x)
: "r" (x));
return x;
}
#define __arch__swab64(x) ___arch__swab64(x)
#endif /* CONFIG_CPU_MIPS64_R2 */
#endif /* CONFIG_CPU_MIPSR2 */
#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
# define __BYTEORDER_HAS_U64__
# define __SWAB_64_THRU_32__
#endif
#endif /* __GNUC__ */
#if defined (__MIPSEB__)
# include <linux/byteorder/big_endian.h>
#elif defined (__MIPSEL__)
# include <linux/byteorder/little_endian.h>
#else
# error "MIPS, but neither __MIPSEB__, nor __MIPSEL__???"
#endif
#endif /* _ASM_BYTEORDER_H */
|
