diff options
author | Nick Piggin <nickpiggin@yahoo.com.au> | 2005-11-13 16:07:24 -0800 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-11-13 18:14:16 -0800 |
commit | 4a6dae6d382e9edf3ff440b819e554ed706359bc (patch) | |
tree | 2945a5095973e2ecf05b503d6deb859083045b8e | |
parent | 53e86b91b7ae66d4c2757195cbd42e00d9199cf2 (diff) | |
download | kernel_samsung_smdk4412-4a6dae6d382e9edf3ff440b819e554ed706359bc.zip kernel_samsung_smdk4412-4a6dae6d382e9edf3ff440b819e554ed706359bc.tar.gz kernel_samsung_smdk4412-4a6dae6d382e9edf3ff440b819e554ed706359bc.tar.bz2 |
[PATCH] atomic: cmpxchg
Introduce an atomic_cmpxchg operation.
Signed-off-by: Nick Piggin <npiggin@suse.de>
Cc: "Paul E. McKenney" <paulmck@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
-rw-r--r-- | Documentation/atomic_ops.txt | 15 | ||||
-rw-r--r-- | arch/sparc/lib/atomic32.c | 21 | ||||
-rw-r--r-- | include/asm-alpha/atomic.h | 2 | ||||
-rw-r--r-- | include/asm-arm/atomic.h | 31 | ||||
-rw-r--r-- | include/asm-arm26/atomic.h | 14 | ||||
-rw-r--r-- | include/asm-cris/atomic.h | 13 | ||||
-rw-r--r-- | include/asm-frv/atomic.h | 2 | ||||
-rw-r--r-- | include/asm-h8300/atomic.h | 13 | ||||
-rw-r--r-- | include/asm-i386/atomic.h | 2 | ||||
-rw-r--r-- | include/asm-ia64/atomic.h | 2 | ||||
-rw-r--r-- | include/asm-m68k/atomic.h | 2 | ||||
-rw-r--r-- | include/asm-m68knommu/atomic.h | 2 | ||||
-rw-r--r-- | include/asm-mips/atomic.h | 2 | ||||
-rw-r--r-- | include/asm-parisc/atomic.h | 1 | ||||
-rw-r--r-- | include/asm-powerpc/atomic.h | 2 | ||||
-rw-r--r-- | include/asm-s390/atomic.h | 2 | ||||
-rw-r--r-- | include/asm-sh/atomic.h | 14 | ||||
-rw-r--r-- | include/asm-sh64/atomic.h | 14 | ||||
-rw-r--r-- | include/asm-sparc/atomic.h | 1 | ||||
-rw-r--r-- | include/asm-sparc64/atomic.h | 2 | ||||
-rw-r--r-- | include/asm-v850/atomic.h | 14 | ||||
-rw-r--r-- | include/asm-x86_64/atomic.h | 2 | ||||
-rw-r--r-- | include/asm-xtensa/atomic.h | 1 |
23 files changed, 169 insertions, 5 deletions
diff --git a/Documentation/atomic_ops.txt b/Documentation/atomic_ops.txt index 8eedaa2..f174416 100644 --- a/Documentation/atomic_ops.txt +++ b/Documentation/atomic_ops.txt @@ -115,6 +115,21 @@ boolean is return which indicates whether the resulting counter value is negative. It requires explicit memory barrier semantics around the operation. +Finally: + + int atomic_cmpxchg(atomic_t *v, int old, int new); + +This performs an atomic compare exchange operation on the atomic value v, +with the given old and new values. Like all atomic_xxx operations, +atomic_cmpxchg will only satisfy its atomicity semantics as long as all +other accesses of *v are performed through atomic_xxx operations. + +atomic_cmpxchg requires explicit memory barriers around the operation. + +The semantics for atomic_cmpxchg are the same as those defined for 'cas' +below. + + If a caller requires memory barrier semantics around an atomic_t operation which does not return a value, a set of interfaces are defined which accomplish this: diff --git a/arch/sparc/lib/atomic32.c b/arch/sparc/lib/atomic32.c index 2e64e8c..be46f65 100644 --- a/arch/sparc/lib/atomic32.c +++ b/arch/sparc/lib/atomic32.c @@ -37,17 +37,28 @@ int __atomic_add_return(int i, atomic_t *v) spin_unlock_irqrestore(ATOMIC_HASH(v), flags); return ret; } +EXPORT_SYMBOL(__atomic_add_return); -void atomic_set(atomic_t *v, int i) +int atomic_cmpxchg(atomic_t *v, int old, int new) { + int ret; unsigned long flags; - spin_lock_irqsave(ATOMIC_HASH(v), flags); - v->counter = i; + spin_lock_irqsave(ATOMIC_HASH(v), flags); + ret = v->counter; + if (likely(ret == old)) + v->counter = new; spin_unlock_irqrestore(ATOMIC_HASH(v), flags); + return ret; } -EXPORT_SYMBOL(__atomic_add_return); -EXPORT_SYMBOL(atomic_set); +void atomic_set(atomic_t *v, int i) +{ + unsigned long flags; + spin_lock_irqsave(ATOMIC_HASH(v), flags); + v->counter = i; + spin_unlock_irqrestore(ATOMIC_HASH(v), flags); +} +EXPORT_SYMBOL(atomic_set); diff --git a/include/asm-alpha/atomic.h b/include/asm-alpha/atomic.h index 20ac3d9..a666080 100644 --- a/include/asm-alpha/atomic.h +++ b/include/asm-alpha/atomic.h @@ -177,6 +177,8 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v) return result; } +#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n))) + #define atomic_dec_return(v) atomic_sub_return(1,(v)) #define atomic64_dec_return(v) atomic64_sub_return(1,(v)) diff --git a/include/asm-arm/atomic.h b/include/asm-arm/atomic.h index 2885972..8ab1689 100644 --- a/include/asm-arm/atomic.h +++ b/include/asm-arm/atomic.h @@ -80,6 +80,23 @@ static inline int atomic_sub_return(int i, atomic_t *v) return result; } +static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new) +{ + u32 oldval, res; + + do { + __asm__ __volatile__("@ atomic_cmpxchg\n" + "ldrex %1, [%2]\n" + "teq %1, %3\n" + "strexeq %0, %4, [%2]\n" + : "=&r" (res), "=&r" (oldval) + : "r" (&ptr->counter), "Ir" (old), "r" (new) + : "cc"); + } while (res); + + return oldval; +} + static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr) { unsigned long tmp, tmp2; @@ -131,6 +148,20 @@ static inline int atomic_sub_return(int i, atomic_t *v) return val; } +static inline int atomic_cmpxchg(atomic_t *v, int old, int new) +{ + int ret; + unsigned long flags; + + local_irq_save(flags); + ret = v->counter; + if (likely(ret == old)) + v->counter = new; + local_irq_restore(flags); + + return ret; +} + static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr) { unsigned long flags; diff --git a/include/asm-arm26/atomic.h b/include/asm-arm26/atomic.h index 4a88235..54b24ea 100644 --- a/include/asm-arm26/atomic.h +++ b/include/asm-arm26/atomic.h @@ -62,6 +62,20 @@ static inline int atomic_sub_return(int i, atomic_t *v) return val; } +static inline int atomic_cmpxchg(atomic_t *v, int old, int new) +{ + int ret; + unsigned long flags; + + local_irq_save(flags); + ret = v->counter; + if (likely(ret == old)) + v->counter = new; + local_irq_restore(flags); + + return ret; +} + static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr) { unsigned long flags; diff --git a/include/asm-cris/atomic.h b/include/asm-cris/atomic.h index 8c2e783..45891f7d 100644 --- a/include/asm-cris/atomic.h +++ b/include/asm-cris/atomic.h @@ -123,6 +123,19 @@ static inline int atomic_inc_and_test(volatile atomic_t *v) return retval; } +static inline int atomic_cmpxchg(atomic_t *v, int old, int new) +{ + int ret; + unsigned long flags; + + cris_atomic_save(v, flags); + ret = v->counter; + if (likely(ret == old)) + v->counter = new; + cris_atomic_restore(v, flags); + return ret; +} + /* Atomic operations are already serializing */ #define smp_mb__before_atomic_dec() barrier() #define smp_mb__after_atomic_dec() barrier() diff --git a/include/asm-frv/atomic.h b/include/asm-frv/atomic.h index e759684..55f06a0 100644 --- a/include/asm-frv/atomic.h +++ b/include/asm-frv/atomic.h @@ -414,4 +414,6 @@ extern uint32_t __cmpxchg_32(uint32_t *v, uint32_t test, uint32_t new); #endif +#define atomic_cmpxchg(v, old, new) ((int)cmpxchg(&((v)->counter), old, new)) + #endif /* _ASM_ATOMIC_H */ diff --git a/include/asm-h8300/atomic.h b/include/asm-h8300/atomic.h index 7230f65..d504392 100644 --- a/include/asm-h8300/atomic.h +++ b/include/asm-h8300/atomic.h @@ -82,6 +82,19 @@ static __inline__ int atomic_dec_and_test(atomic_t *v) return ret == 0; } +static inline int atomic_cmpxchg(atomic_t *v, int old, int new) +{ + int ret; + unsigned long flags; + + local_irq_save(flags); + ret = v->counter; + if (likely(ret == old)) + v->counter = new; + local_irq_restore(flags); + return ret; +} + static __inline__ void atomic_clear_mask(unsigned long mask, unsigned long *v) { __asm__ __volatile__("stc ccr,r1l\n\t" diff --git a/include/asm-i386/atomic.h b/include/asm-i386/atomic.h index 509720b..5ff698e 100644 --- a/include/asm-i386/atomic.h +++ b/include/asm-i386/atomic.h @@ -215,6 +215,8 @@ static __inline__ int atomic_sub_return(int i, atomic_t *v) return atomic_add_return(-i,v); } +#define atomic_cmpxchg(v, old, new) ((int)cmpxchg(&((v)->counter), old, new)) + #define atomic_inc_return(v) (atomic_add_return(1,v)) #define atomic_dec_return(v) (atomic_sub_return(1,v)) diff --git a/include/asm-ia64/atomic.h b/include/asm-ia64/atomic.h index 874a6f8..593d3da 100644 --- a/include/asm-ia64/atomic.h +++ b/include/asm-ia64/atomic.h @@ -88,6 +88,8 @@ ia64_atomic64_sub (__s64 i, atomic64_t *v) return new; } +#define atomic_cmpxchg(v, old, new) ((int)cmpxchg(&((v)->counter), old, new)) + #define atomic_add_return(i,v) \ ({ \ int __ia64_aar_i = (i); \ diff --git a/include/asm-m68k/atomic.h b/include/asm-m68k/atomic.h index 38f3043..b821975 100644 --- a/include/asm-m68k/atomic.h +++ b/include/asm-m68k/atomic.h @@ -139,6 +139,8 @@ static inline void atomic_set_mask(unsigned long mask, unsigned long *v) __asm__ __volatile__("orl %1,%0" : "+m" (*v) : "id" (mask)); } +#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n))) + /* Atomic operations are already serializing */ #define smp_mb__before_atomic_dec() barrier() #define smp_mb__after_atomic_dec() barrier() diff --git a/include/asm-m68knommu/atomic.h b/include/asm-m68knommu/atomic.h index a83631e..2fd33a5 100644 --- a/include/asm-m68knommu/atomic.h +++ b/include/asm-m68knommu/atomic.h @@ -128,6 +128,8 @@ static inline int atomic_sub_return(int i, atomic_t * v) return temp; } +#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n))) + #define atomic_dec_return(v) atomic_sub_return(1,(v)) #define atomic_inc_return(v) atomic_add_return(1,(v)) diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h index 6202eb8..4fba0d0 100644 --- a/include/asm-mips/atomic.h +++ b/include/asm-mips/atomic.h @@ -287,6 +287,8 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) return result; } +#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n))) + #define atomic_dec_return(v) atomic_sub_return(1,(v)) #define atomic_inc_return(v) atomic_add_return(1,(v)) diff --git a/include/asm-parisc/atomic.h b/include/asm-parisc/atomic.h index 048a2c7..52c9a45 100644 --- a/include/asm-parisc/atomic.h +++ b/include/asm-parisc/atomic.h @@ -164,6 +164,7 @@ static __inline__ int atomic_read(const atomic_t *v) } /* exported interface */ +#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n))) #define atomic_add(i,v) ((void)(__atomic_add_return( ((int)i),(v)))) #define atomic_sub(i,v) ((void)(__atomic_add_return(-((int)i),(v)))) diff --git a/include/asm-powerpc/atomic.h b/include/asm-powerpc/atomic.h index 9c0b372..37205fa 100644 --- a/include/asm-powerpc/atomic.h +++ b/include/asm-powerpc/atomic.h @@ -164,6 +164,8 @@ static __inline__ int atomic_dec_return(atomic_t *v) return t; } +#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n))) + #define atomic_sub_and_test(a, v) (atomic_sub_return((a), (v)) == 0) #define atomic_dec_and_test(v) (atomic_dec_return((v)) == 0) diff --git a/include/asm-s390/atomic.h b/include/asm-s390/atomic.h index 9d86ba6..631014d 100644 --- a/include/asm-s390/atomic.h +++ b/include/asm-s390/atomic.h @@ -198,6 +198,8 @@ atomic_compare_and_swap(int expected_oldval,int new_val,atomic_t *v) return retval; } +#define atomic_cmpxchg(v, o, n) (atomic_compare_and_swap((o), (n), &((v)->counter))) + #define smp_mb__before_atomic_dec() smp_mb() #define smp_mb__after_atomic_dec() smp_mb() #define smp_mb__before_atomic_inc() smp_mb() diff --git a/include/asm-sh/atomic.h b/include/asm-sh/atomic.h index 3c4f805d..a148c76 100644 --- a/include/asm-sh/atomic.h +++ b/include/asm-sh/atomic.h @@ -87,6 +87,20 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v) #define atomic_inc(v) atomic_add(1,(v)) #define atomic_dec(v) atomic_sub(1,(v)) +static inline int atomic_cmpxchg(atomic_t *v, int old, int new) +{ + int ret; + unsigned long flags; + + local_irq_save(flags); + ret = v->counter; + if (likely(ret == old)) + v->counter = new; + local_irq_restore(flags); + + return ret; +} + static __inline__ void atomic_clear_mask(unsigned int mask, atomic_t *v) { unsigned long flags; diff --git a/include/asm-sh64/atomic.h b/include/asm-sh64/atomic.h index 8c3872d..6eeb57b 100644 --- a/include/asm-sh64/atomic.h +++ b/include/asm-sh64/atomic.h @@ -99,6 +99,20 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v) #define atomic_inc(v) atomic_add(1,(v)) #define atomic_dec(v) atomic_sub(1,(v)) +static inline int atomic_cmpxchg(atomic_t *v, int old, int new) +{ + int ret; + unsigned long flags; + + local_irq_save(flags); + ret = v->counter; + if (likely(ret == old)) + v->counter = new; + local_irq_restore(flags); + + return ret; +} + static __inline__ void atomic_clear_mask(unsigned int mask, atomic_t *v) { unsigned long flags; diff --git a/include/asm-sparc/atomic.h b/include/asm-sparc/atomic.h index 37f6ab6..52bdd1a 100644 --- a/include/asm-sparc/atomic.h +++ b/include/asm-sparc/atomic.h @@ -19,6 +19,7 @@ typedef struct { volatile int counter; } atomic_t; #define ATOMIC_INIT(i) { (i) } extern int __atomic_add_return(int, atomic_t *); +extern int atomic_cmpxchg(atomic_t *, int, int); extern void atomic_set(atomic_t *, int); #define atomic_read(v) ((v)->counter) diff --git a/include/asm-sparc64/atomic.h b/include/asm-sparc64/atomic.h index e175afc..3a0b438 100644 --- a/include/asm-sparc64/atomic.h +++ b/include/asm-sparc64/atomic.h @@ -70,6 +70,8 @@ extern int atomic64_sub_ret(int, atomic64_t *); #define atomic_add_negative(i, v) (atomic_add_ret(i, v) < 0) #define atomic64_add_negative(i, v) (atomic64_add_ret(i, v) < 0) +#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n))) + /* Atomic operations are already serializing */ #ifdef CONFIG_SMP #define smp_mb__before_atomic_dec() membar_storeload_loadload(); diff --git a/include/asm-v850/atomic.h b/include/asm-v850/atomic.h index 395268a..e497166 100644 --- a/include/asm-v850/atomic.h +++ b/include/asm-v850/atomic.h @@ -90,6 +90,20 @@ static __inline__ void atomic_clear_mask (unsigned long mask, unsigned long *add #define atomic_dec_and_test(v) (atomic_sub_return (1, (v)) == 0) #define atomic_add_negative(i,v) (atomic_add_return ((i), (v)) < 0) +static inline int atomic_cmpxchg(atomic_t *v, int old, int new) +{ + int ret; + unsigned long flags; + + local_irq_save(flags); + ret = v->counter; + if (likely(ret == old)) + v->counter = new; + local_irq_restore(flags); + + return ret; +} + /* Atomic operations are already serializing on ARM */ #define smp_mb__before_atomic_dec() barrier() #define smp_mb__after_atomic_dec() barrier() diff --git a/include/asm-x86_64/atomic.h b/include/asm-x86_64/atomic.h index fc4c595..75c8a1e 100644 --- a/include/asm-x86_64/atomic.h +++ b/include/asm-x86_64/atomic.h @@ -360,6 +360,8 @@ static __inline__ int atomic_sub_return(int i, atomic_t *v) return atomic_add_return(-i,v); } +#define atomic_cmpxchg(v, old, new) ((int)cmpxchg(&((v)->counter), old, new)) + #define atomic_inc_return(v) (atomic_add_return(1,v)) #define atomic_dec_return(v) (atomic_sub_return(1,v)) diff --git a/include/asm-xtensa/atomic.h b/include/asm-xtensa/atomic.h index 12b5732..cd40c5e 100644 --- a/include/asm-xtensa/atomic.h +++ b/include/asm-xtensa/atomic.h @@ -223,6 +223,7 @@ static inline int atomic_sub_return(int i, atomic_t * v) */ #define atomic_add_negative(i,v) (atomic_add_return((i),(v)) < 0) +#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n))) static inline void atomic_clear_mask(unsigned int mask, atomic_t *v) { |