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author | Yaniv Rosner <yanivr@broadcom.com> | 2009-11-05 19:18:26 +0200 |
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committer | David S. Miller <davem@davemloft.net> | 2009-11-05 20:00:44 -0800 |
commit | 93f72884dd1622e443109abcd3e5e8f8cca0a6fe (patch) | |
tree | ca81b509491ef9cec56c8dfd7d8dfb5aaaab307c | |
parent | 4f60dab113230943fb1bc7969053d9a1b6578339 (diff) | |
download | kernel_samsung_smdk4412-93f72884dd1622e443109abcd3e5e8f8cca0a6fe.zip kernel_samsung_smdk4412-93f72884dd1622e443109abcd3e5e8f8cca0a6fe.tar.gz kernel_samsung_smdk4412-93f72884dd1622e443109abcd3e5e8f8cca0a6fe.tar.bz2 |
bnx2x: Fix BCM8726 ROM load seq
Signed-off-by: Yaniv Rosner <yanivr@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r-- | drivers/net/bnx2x_link.c | 13 |
1 files changed, 2 insertions, 11 deletions
diff --git a/drivers/net/bnx2x_link.c b/drivers/net/bnx2x_link.c index 7897fe1..1b73c1d 100644 --- a/drivers/net/bnx2x_link.c +++ b/drivers/net/bnx2x_link.c @@ -2592,16 +2592,11 @@ static void bnx2x_bcm8726_external_rom_boot(struct link_params *params) /* Need to wait 100ms after reset */ msleep(100); - /* Set serial boot control for external load */ - bnx2x_cl45_write(bp, port, ext_phy_type, ext_phy_addr, - MDIO_PMA_DEVAD, - MDIO_PMA_REG_MISC_CTRL1, 0x0001); - /* Micro controller re-boot */ bnx2x_cl45_write(bp, port, ext_phy_type, ext_phy_addr, MDIO_PMA_DEVAD, MDIO_PMA_REG_GEN_CTRL, - MDIO_PMA_REG_GEN_CTRL_ROM_RESET_INTERNAL_MP); + 0x018B); /* Set soft reset */ bnx2x_cl45_write(bp, port, ext_phy_type, ext_phy_addr, @@ -2609,14 +2604,10 @@ static void bnx2x_bcm8726_external_rom_boot(struct link_params *params) MDIO_PMA_REG_GEN_CTRL, MDIO_PMA_REG_GEN_CTRL_ROM_MICRO_RESET); - /* Set PLL register value to be same like in P13 ver */ bnx2x_cl45_write(bp, port, ext_phy_type, ext_phy_addr, MDIO_PMA_DEVAD, - MDIO_PMA_REG_PLL_CTRL, - 0x73A0); + MDIO_PMA_REG_MISC_CTRL1, 0x0001); - /* Clear soft reset. - Will automatically reset micro-controller re-boot */ bnx2x_cl45_write(bp, port, ext_phy_type, ext_phy_addr, MDIO_PMA_DEVAD, MDIO_PMA_REG_GEN_CTRL, |