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author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-02-13 07:59:48 -0800 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-02-13 07:59:48 -0800 |
commit | 091994cfb8e7d7a372c2d547778a91012d899e16 (patch) | |
tree | 71c6d214f9287bb61d24345a93b60579937a711b /Documentation/devicetree/bindings/powerpc/4xx/cpm.txt | |
parent | d8ed516f82f0f4cda11282450512310ab273637e (diff) | |
parent | c170093d31bd4e3bc51881cc0f123beeca7872c9 (diff) | |
download | kernel_samsung_smdk4412-091994cfb8e7d7a372c2d547778a91012d899e16.zip kernel_samsung_smdk4412-091994cfb8e7d7a372c2d547778a91012d899e16.tar.gz kernel_samsung_smdk4412-091994cfb8e7d7a372c2d547778a91012d899e16.tar.bz2 |
Merge branch 'spi/merge' of git://git.secretlab.ca/git/linux-2.6
* 'spi/merge' of git://git.secretlab.ca/git/linux-2.6:
devicetree-discuss is moderated for non-subscribers
MAINTAINERS: Add entry for GPIO subsystem
dt: add documentation of ARM dt boot interface
dt: Remove obsolete description of powerpc boot interface
dt: Move device tree documentation out of powerpc directory
spi/spi_sh_msiof: fix wrong address calculation, which leads to an Oops
Diffstat (limited to 'Documentation/devicetree/bindings/powerpc/4xx/cpm.txt')
-rw-r--r-- | Documentation/devicetree/bindings/powerpc/4xx/cpm.txt | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/powerpc/4xx/cpm.txt b/Documentation/devicetree/bindings/powerpc/4xx/cpm.txt new file mode 100644 index 0000000..ee45980 --- /dev/null +++ b/Documentation/devicetree/bindings/powerpc/4xx/cpm.txt @@ -0,0 +1,52 @@ +PPC4xx Clock Power Management (CPM) node + +Required properties: + - compatible : compatible list, currently only "ibm,cpm" + - dcr-access-method : "native" + - dcr-reg : < DCR register range > + +Optional properties: + - er-offset : All 4xx SoCs with a CPM controller have + one of two different order for the CPM + registers. Some have the CPM registers + in the following order (ER,FR,SR). The + others have them in the following order + (SR,ER,FR). For the second case set + er-offset = <1>. + - unused-units : specifier consist of one cell. For each + bit in the cell, the corresponding bit + in CPM will be set to turn off unused + devices. + - idle-doze : specifier consist of one cell. For each + bit in the cell, the corresponding bit + in CPM will be set to turn off unused + devices. This is usually just CPM[CPU]. + - standby : specifier consist of one cell. For each + bit in the cell, the corresponding bit + in CPM will be set on standby and + restored on resume. + - suspend : specifier consist of one cell. For each + bit in the cell, the corresponding bit + in CPM will be set on suspend (mem) and + restored on resume. Note, for standby + and suspend the corresponding bits can + be different or the same. Usually for + standby only class 2 and 3 units are set. + However, the interface does not care. + If they are the same, the additional + power saving will be seeing if support + is available to put the DDR in self + refresh mode and any additional power + saving techniques for the specific SoC. + +Example: + CPM0: cpm { + compatible = "ibm,cpm"; + dcr-access-method = "native"; + dcr-reg = <0x160 0x003>; + er-offset = <0>; + unused-units = <0x00000100>; + idle-doze = <0x02000000>; + standby = <0xfeff0000>; + suspend = <0xfeff791d>; +}; |