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authorTejun Heo <tj@kernel.org>2011-01-25 14:26:50 +0100
committerTejun Heo <tj@kernel.org>2011-01-25 14:26:50 +0100
commit19df0c2fef010e94e90df514aaf4e73f6b80145c (patch)
tree4b0b9c10622aead0d8b658cca6c49090149a91a8 /arch/arm
parentc723fdab8aa728dc2bf0da6a0de8bb9c3f588d84 (diff)
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percpu: align percpu readmostly subsection to cacheline
Currently percpu readmostly subsection may share cachelines with other percpu subsections which may result in unnecessary cacheline bounce and performance degradation. This patch adds @cacheline parameter to PERCPU() and PERCPU_VADDR() linker macros, makes each arch linker scripts specify its cacheline size and use it to align percpu subsections. This is based on Shaohua's x86 only patch. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Shaohua Li <shaohua.li@intel.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/kernel/vmlinux.lds.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index 86b66f3..cf78a03 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -70,7 +70,7 @@ SECTIONS
#endif
}
- PERCPU(PAGE_SIZE)
+ PERCPU(32, PAGE_SIZE)
#ifndef CONFIG_XIP_KERNEL
. = ALIGN(PAGE_SIZE);