aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm
diff options
context:
space:
mode:
authorDave Martin <dave.martin@linaro.org>2010-11-29 19:43:26 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-11-30 13:44:25 +0000
commitbfa64c4ab1235b732542f11f4e0005e1774f779a (patch)
treed390ec77a74719fbbb060337efbc5aadb3a1d585 /arch/arm
parent6323875db20fd8ca8c8fbbd608bc377f2d4c8cf5 (diff)
downloadkernel_samsung_smdk4412-bfa64c4ab1235b732542f11f4e0005e1774f779a.zip
kernel_samsung_smdk4412-bfa64c4ab1235b732542f11f4e0005e1774f779a.tar.gz
kernel_samsung_smdk4412-bfa64c4ab1235b732542f11f4e0005e1774f779a.tar.bz2
ARM: 6502/1: Thumb-2: Fix CONFIG_THUMB2_KERNEL breakage in compressed/head.S
Some instruction operand combinations are used here which are nor permitted in Thumb-2. In particular, most uses of pc as an operand are disallowed in Thumb-2, and deprecated in ARM from ARMv7 onwards. The modified code introduced by this patch should be compatible with all architecture versions >= v3, with or without CONFIG_THUMB2_KERNEL. Reviewed-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Dave Martin <dave.martin@linaro.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/compressed/head.S6
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 9be21ba..be97e08 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -174,7 +174,8 @@ not_angel:
ldr sp, [r0, #28]
#ifdef CONFIG_AUTO_ZRELADDR
@ determine final kernel image address
- and r4, pc, #0xf8000000
+ mov r4, pc
+ and r4, r4, #0xf8000000
add r4, r4, #TEXT_OFFSET
#else
ldr r4, =zreladdr
@@ -445,7 +446,8 @@ __setup_mmu: sub r3, r4, #16384 @ Page directory size
*/
mov r1, #0x1e
orr r1, r1, #3 << 10
- mov r2, pc, lsr #20
+ mov r2, pc
+ mov r2, r2, lsr #20
orr r1, r1, r2, lsl #20
add r0, r3, r2, lsl #2
str r1, [r0], #4