diff options
| author | Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 2007-10-02 23:21:36 +0900 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-10-11 23:46:14 +0100 |
| commit | f13558c2a4a7339192ff7148ee903340affdb790 (patch) | |
| tree | ee42395f24b7e7ba723b6e132178ad7dde0cd25e /arch/mips/cobalt | |
| parent | 3282bd3cb0c7653e604c0d3666331281ae8f74c4 (diff) | |
| download | kernel_samsung_smdk4412-f13558c2a4a7339192ff7148ee903340affdb790.zip kernel_samsung_smdk4412-f13558c2a4a7339192ff7148ee903340affdb790.tar.gz kernel_samsung_smdk4412-f13558c2a4a7339192ff7148ee903340affdb790.tar.bz2 | |
[MIPS] Cobalt: Remove cobalt_machine_power_off()
It's same as cobalt_machine_halt().
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/cobalt')
| -rw-r--r-- | arch/mips/cobalt/reset.c | 9 | ||||
| -rw-r--r-- | arch/mips/cobalt/setup.c | 3 |
2 files changed, 1 insertions, 11 deletions
diff --git a/arch/mips/cobalt/reset.c b/arch/mips/cobalt/reset.c index 81628b3..71eb4cc 100644 --- a/arch/mips/cobalt/reset.c +++ b/arch/mips/cobalt/reset.c @@ -61,12 +61,3 @@ void cobalt_machine_restart(char *command) /* we should never get here */ cobalt_machine_halt(); } - -/* - * This triggers the luser mode device driver for the power switch ;-) - */ -void cobalt_machine_power_off(void) -{ - printk("You can switch the machine off now.\n"); - cobalt_machine_halt(); -} diff --git a/arch/mips/cobalt/setup.c b/arch/mips/cobalt/setup.c index 345e4ae..d11bb1b 100644 --- a/arch/mips/cobalt/setup.c +++ b/arch/mips/cobalt/setup.c @@ -25,7 +25,6 @@ extern void cobalt_machine_restart(char *command); extern void cobalt_machine_halt(void); -extern void cobalt_machine_power_off(void); const char *get_system_type(void) { @@ -96,7 +95,7 @@ void __init plat_mem_setup(void) _machine_restart = cobalt_machine_restart; _machine_halt = cobalt_machine_halt; - pm_power_off = cobalt_machine_power_off; + pm_power_off = cobalt_machine_halt; set_io_port_base(CKSEG1ADDR(GT_DEF_PCI0_IO_BASE)); |