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| author | David S. Miller <davem@davemloft.net> | 2009-03-26 15:23:24 -0700 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2009-03-26 15:23:24 -0700 |
| commit | 08abe18af1f78ee80c3c3a5ac47c3e0ae0beadf6 (patch) | |
| tree | 2be39bf8942edca1bcec735145e144a682ca9cd3 /arch/mips/kernel/traps.c | |
| parent | f0de70f8bb56952f6e016a65a8a8d006918f5bf6 (diff) | |
| parent | 0384e2959127a56d0640505d004d8dd92f9c29f5 (diff) | |
| download | kernel_samsung_smdk4412-08abe18af1f78ee80c3c3a5ac47c3e0ae0beadf6.zip kernel_samsung_smdk4412-08abe18af1f78ee80c3c3a5ac47c3e0ae0beadf6.tar.gz kernel_samsung_smdk4412-08abe18af1f78ee80c3c3a5ac47c3e0ae0beadf6.tar.bz2 | |
Merge branch 'master' of /home/davem/src/GIT/linux-2.6/
Conflicts:
drivers/net/wimax/i2400m/usb-notif.c
Diffstat (limited to 'arch/mips/kernel/traps.c')
| -rw-r--r-- | arch/mips/kernel/traps.c | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index b2d7041..29fadac 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -1520,7 +1520,9 @@ void __cpuinit per_cpu_trap_init(void) #endif /* CONFIG_MIPS_MT_SMTC */ if (cpu_has_veic || cpu_has_vint) { + unsigned long sr = set_c0_status(ST0_BEV); write_c0_ebase(ebase); + write_c0_status(sr); /* Setting vector spacing enables EI/VI mode */ change_c0_intctl(0x3e0, VECTORSPACING); } @@ -1602,8 +1604,6 @@ void __cpuinit set_uncached_handler(unsigned long offset, void *addr, #ifdef CONFIG_64BIT unsigned long uncached_ebase = TO_UNCAC(ebase); #endif - if (cpu_has_mips_r2) - uncached_ebase += (read_c0_ebase() & 0x3ffff000); if (!addr) panic(panic_null_cerr); @@ -1635,9 +1635,11 @@ void __init trap_init(void) return; /* Already done */ #endif - if (cpu_has_veic || cpu_has_vint) - ebase = (unsigned long) alloc_bootmem_low_pages(0x200 + VECTORSPACING*64); - else { + if (cpu_has_veic || cpu_has_vint) { + unsigned long size = 0x200 + VECTORSPACING*64; + ebase = (unsigned long) + __alloc_bootmem(size, 1 << fls(size), 0); + } else { ebase = CAC_BASE; if (cpu_has_mips_r2) ebase += (read_c0_ebase() & 0x3ffff000); |