MIPS: Loongson 2F: Add CPU frequency scaling support

Loongson 2F supports CPU clock scaling. When put it into wait mode by
setting the frequency as ZERO it will stay in this mode until an external
interrupt wakes the CPU again.

To enable clock scaling support, an external timer of a known stable rate
is required.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: cpufreq@vger.kernel.org,
Cc: Dave Jones <davej@redhat.com>,
Cc: Dominik Brodowski <linux@dominikbrodowski.net>,
Cc: yanh@lemote.com
Cc: huhb@lemote.com,
Patchwork: http://patchwork.linux-mips.org/patch/660/
Patchwork: http://patchwork.linux-mips.org/patch/751/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

4 files changed, 37 insertions, 3 deletions

diff --git a/arch/mips/loongson/Kconfig b/arch/mips/loongson/Kconfig
index 8b5cc13..7a86987 100644
--- a/arch/mips/loongson/Kconfig
+++ b/arch/mips/loongson/Kconfig
@@ -34,10 +34,10 @@ config LEMOTE_MACH2F
 	select ARCH_SPARSEMEM_ENABLE
 	select BOARD_SCACHE
 	select BOOT_ELF32
-	select CEVT_R4K
+	select CEVT_R4K if ! MIPS_EXTERNAL_TIMER
 	select CPU_HAS_WB
 	select CS5536
-	select CSRC_R4K
+	select CSRC_R4K if ! MIPS_EXTERNAL_TIMER
 	select DMA_NONCOHERENT
 	select GENERIC_HARDIRQS_NO__DO_IRQ
 	select GENERIC_ISA_DMA_SUPPORT_BROKEN
@@ -65,6 +65,7 @@ config CS5536
 config CS5536_MFGPT
 	bool "CS5536 MFGPT Timer"
 	depends on CS5536
+	select MIPS_EXTERNAL_TIMER
 	help
 	  This option enables the mfgpt0 timer of AMD CS5536.
 
diff --git a/arch/mips/loongson/common/Makefile b/arch/mips/loongson/common/Makefile
index a21724d..8d71892 100644
--- a/arch/mips/loongson/common/Makefile
+++ b/arch/mips/loongson/common/Makefile
@@ -3,7 +3,7 @@
 #
 
 obj-y += setup.o init.o cmdline.o env.o time.o reset.o irq.o \
-    pci.o bonito-irq.o mem.o machtype.o uart_base.o
+    pci.o bonito-irq.o mem.o machtype.o platform.o uart_base.o
 
 #
 # Early printk support
diff --git a/arch/mips/loongson/common/env.c b/arch/mips/loongson/common/env.c
index b9ef503..196d947 100644
--- a/arch/mips/loongson/common/env.c
+++ b/arch/mips/loongson/common/env.c
@@ -17,11 +17,14 @@
  * Free Software Foundation;  either version 2 of the  License, or (at your
  * option) any later version.
  */
+#include <linux/module.h>
+
 #include <asm/bootinfo.h>
 
 #include <loongson.h>
 
 unsigned long bus_clock, cpu_clock_freq;
+EXPORT_SYMBOL(cpu_clock_freq);
 unsigned long memsize, highmemsize;
 
 /* pmon passes arguments in 32bit pointers */
diff --git a/arch/mips/loongson/common/platform.c b/arch/mips/loongson/common/platform.c
new file mode 100644
index 0000000..be81777
--- /dev/null
+++ b/arch/mips/loongson/common/platform.c
@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2009 Lemote Inc.
+ * Author: Wu Zhangjin, wuzj@lemote.com
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/err.h>
+#include <linux/platform_device.h>
+
+static struct platform_device loongson2_cpufreq_device = {
+	.name = "loongson2_cpufreq",
+	.id = -1,
+};
+
+static int __init loongson2_cpufreq_init(void)
+{
+	struct cpuinfo_mips *c = &current_cpu_data;
+
+	/* Only 2F revision and it's successors support CPUFreq */
+	if ((c->processor_id & PRID_REV_MASK) >= PRID_REV_LOONGSON2F)
+		return platform_device_register(&loongson2_cpufreq_device);
+
+	return -ENODEV;
+}
+
+arch_initcall(loongson2_cpufreq_init);